Multi-Processor Mode Switching Without Reboot
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Solution Overview
Problem
Multi-processor systems face challenges in seamlessly switching between safety and performance modes with minimal time delay, especially when transitioning due to external events or exceptions, which can impact data integrity and system performance.
Innovation Solution
A method and system for switching between performance and safety modes in multi-processor systems by saving and loading context states in memory, synchronizing processors, and resetting units such as prefetch and return stack units, allowing for smooth operation in lock-step mode without rebooting the system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the multi-processor system switches between safety mode and performance mode, then data integrity and system performance are improved, but time delay and operational complexity increase
Solution Approach 1:
The patent applies preliminary action by pre-saving processor contexts in memory before mode switching is required. When an external event or exception occurs, the system can quickly restore a previously saved context rather than performing a full system reboot, thereby reducing time delay while maintaining data integrity through proper context preservation and restoration protocols
Solution Approach 2:
The patent implements dynamics by enabling the multi-processor system to dynamically switch between safety mode (lock-step operation) and performance mode based on runtime conditions. The system can transition from high-performance MIMD/SIMD operation to safety-critical lock-step mode when errors are detected or external events occur, and vice versa, allowing adaptive optimization of both reliability and performance characteristics
2Reliability
If the multi-processor system switches between safety mode and performance mode, then data integrity and system performance are improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the multi-processor system to perform multiple functions through a single unified architecture. The same processor cores can operate in both performance mode (MIMD/SIMD) and safety mode (lock-step), with mode switching controlled by software context management. This eliminates the need for separate hardware paths for each mode, reducing overall device complexity while maintaining the ability to switch between operational states
Solution Approach 2:
The patent uses copying by creating and maintaining software contexts that represent processor states. When switching modes, the system saves the current context to memory and restores a previously saved context, effectively copying the processor state rather than physically reconfiguring hardware. This software-based context management simplifies the switching mechanism compared to hardware reconfiguration approaches
Data Source
AI summary
An embodiment of the invention provides a method for changing a multi-processor system from a performance mode to a safety mode while the system continues to run software. When an external event or exception occurs, context is switched from the performance mode to the safety mode. After context is switched, at least one pair of CPUs is synchronized to operate in the safety mode. In addition, a multi-processor system may be switched form the safety mode to the performance mode while the software continues to operate.