Charge Re-use Analog Fourier Transform Circuit for SDR Power Reduction

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Solution Overview

Problem

Software defined radios (SDRs) face impractical analog-to-digital converter (ADC) specifications when attempting to perform spectrum sensing for wideband inputs, leading to high power consumption and challenging signal reconstruction, especially with techniques like time interleaving and N-path filter-banks.

Innovation Solution

The design of a charge re-use analog Fourier transform (CRAFT) system, which uses passive switched capacitors to achieve a 16-point analog domain fast Fourier transform, reducing sample rate and dynamic range requirements by leveraging charge re-use and minimal phase properties, thereby lowering power consumption and improving linearity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If time interleaving ADCs are used to reduce ADC speed, then ADC speed requirement is reduced, but input dynamic range remains large leading to high power consumption

Engineering Contradiction:
ImproveADC speedVSAvoidADC power consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent divides the wideband input signal into multiple narrower bandwidth channels using filter banks, where each channel is processed by a separate ADC. This segmentation allows each ADC to operate at lower speed with reduced dynamic range requirements, thereby reducing power consumption while maintaining overall wideband coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces frequency domain processing as an additional dimension by using filter banks to separate the signal spectrum into multiple bands before ADC conversion. This transforms the problem from a single high-speed ADC processing wideband signal to multiple low-speed ADCs processing narrowband signals, effectively reducing power consumption.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If filter-banks based on PLLs, mixers and low-pass filters are used to reduce ADC speed and dynamic range, then ADC specifications are improved, but power consumption increases due to these components

Engineering Contradiction:
ImproveADC dynamic rangeVSAvoidfilter-bank power consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes the high-power components (PLLs, mixers, and low-pass filters) from the filter-bank structure, replacing them with a more power-efficient implementation that achieves the same signal separation function using simpler circuitry optimized for low power consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the traditional mechanical/electronic filter-bank components (PLLs, mixers, low-pass filters) with an alternative implementation that uses different physical principles or circuit topologies to achieve the same frequency separation function with reduced power consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If wideband digitization is performed with high sample rate ADCs, then signal fidelity is maintained, but power consumption and complexity increase significantly

Engineering Contradiction:
Improvesignal fidelityVSAvoiddigitization system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the wideband signal into multiple narrowband channels, allowing each channel to be digitized independently at lower sample rates. This maintains signal fidelity for each channel while reducing the overall system complexity and power consumption compared to a single high-speed ADC approach.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9467178B2Pseudo true time delay for multi-antenna systems
Publication Date: 2016.10.11 REGENTS OF THE UNIVERSITY OF MINNESOTA
  • US9467178B2 patent drawing
  • US9467178B2 patent drawing
  • US9467178B2 patent drawing

AI summary

A linear transform can be performed using a passive analog multi-stage charge re-use linear transform circuit. The passive analog multi-stage charge re-use linear transform circuit transforms an input analog circuit to generate a transformed analog output signal. The passive analog multi-stage charge re-use linear transform circuit may be included in a software defined radio (SDR), where the transformed analog output signal may be output to an analog-to-digital converter (ADC) of the SDR device so as to enable the ADC to perform wideband spectrum sensing. The passive analog multi-stage charge re-use linear transform circuit may also be included in a beamforming device so as to enable the device to perform spectral shifting and spatial shifting of signals. This passive analog multi-stage charge re-use linear transform circuit may promote reduced power consumption in comparison to other circuits while also supporting wideband applications at high sampling rates.