Cross-Coupled Standard Cell Layout With Via-Free Diagonal Contacts
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Solution Overview
Problem
Traditional approaches to scaling standard cells are hindered by lithographic limitations, making complex layout designs difficult as technology advances, and existing cross-coupling techniques often require additional mask layers and area bloat.
Innovation Solution
A cross couple design featuring a first contact connected to two gate structures with a second contact positioned diagonally, avoiding via connections, and a horizontal contact connecting to both gate lines on the same wiring layer, allowing for improved logic area scaling without additional mask layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional cross-coupling techniques are implemented using dummy polysilicon gates or sub-ground rule constructs, then logic scaling can be achieved, but area bloat and manufacturing complexity increase
Solution Approach 1:
The cross-couple structure is segmented into two separate gate lines (first gate line and second gate line) that are diagonally positioned and separated, rather than using a single complex gate structure. This segmentation allows independent optimization of each gate line while achieving the desired cross-coupling functionality.
Solution Approach 2:
The patent transitions from planar cross-coupling to a three-dimensional arrangement by positioning gate lines at different diagonal positions and using multiple wiring layers (first wiring layer for contacts, second wiring layer for wiring structures). This dimensional change enables cross-coupling without requiring dummy gates or complex planar layouts.
2Reliability
If additional via connections are used to implement cross-couples, then connectivity is achieved, but MOL congestion increases
Solution Approach 1:
The patent extracts the cross-coupling functionality from the traditional via-based implementation by using direct diagonal contacts that connect gate lines without requiring intermediate via connections. This removes the need for complex via stacks and reduces MOL layer congestion.
Solution Approach 2:
The patent introduces diagonal contacts as intermediary elements that directly connect the first and second gate lines at diagonal positions. These contacts serve as mediators that establish connectivity between gate lines without requiring multiple via connections through intermediate layers, thereby reducing MOL congestion.
3Reliability
If dummy polysilicon gates are inserted for cross-coupling, then cross-couple functionality is achieved, but area increases
Solution Approach 1:
The patent employs asymmetric diagonal positioning of the first and second gate lines, where the gate lines are separated and positioned diagonally rather than symmetrically. This asymmetric arrangement enables cross-coupling functionality with reduced area compared to traditional dummy gate implementations, as the diagonal separation allows more efficient space utilization.
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to a cross couple design for high density standard cells and methods of manufacture. The structure includes a first contact connected in a cross couple circuit to at least two gate structures, and a second contact connected to the first contact at a location which is devoid of any via connection.