Cross-Coupled Electrostatic Protection Circuit for Array Signal Lines
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Solution Overview
Problem
As display device resolution increases, signal lines on the array substrate become denser, leading to higher chances of current leakage or short circuits due to static electricity, which existing electrostatic protection devices struggle to effectively address.
Innovation Solution
An electrostatic protection circuit comprising at least one first transistor and one second transistor, where the gate and first electrodes of each transistor are connected to adjacent signal lines, allowing for effective discharge of static electricity between these lines, reducing the likelihood of defects like short circuits without requiring additional wiring, and optimizing space usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If signal lines are made denser to increase display resolution, then display resolution is improved, but the risk of current leakage and short circuits due to static electricity increases
Solution Approach 1:
The patent introduces an electrostatic protection circuit as an intermediary component between adjacent signal lines. This circuit includes transistors that act as mediators to detect and discharge static electricity accumulated on signal lines, preventing direct discharge between adjacent lines. The protection circuit serves as a buffer that maintains signal line integrity while allowing controlled electrostatic discharge, thus resolving the contradiction between high density and reliability.
2Reliability
If electrostatic protection devices are added to protect signal lines, then signal line reliability is improved, but device complexity and space usage increase
Solution Approach 1:
The patent merges the electrostatic protection function with the existing signal line structure by sharing common electrodes and utilizing the same transistor fabrication process. Multiple signal lines share common electrostatic protection resources, such as common source electrodes and drain electrodes, which reduces the total number of discrete protection components needed. This merging approach maintains reliability while reducing device complexity and space occupation.
Solution Approach 2:
The electrostatic protection circuit is designed with universal components that can serve multiple functions. The same transistor structure and electrode configuration are used across different signal lines, allowing a single protection circuit design to protect multiple adjacent signal lines. This multi-functionality reduces overall circuit complexity and simplifies manufacturing while maintaining comprehensive protection.
3Reliability
If electrostatic protection devices are added to protect signal lines, then signal line reliability is improved, but the occupied area on the array substrate increases
Solution Approach 1:
The patent implements a nested structure where the electrostatic protection circuit is integrated within the existing signal line layout. The protection transistors are positioned such that their gates are connected to signal lines while their source and drain electrodes are shared with adjacent signal lines. This nesting approach allows the protection circuit to occupy the same spatial footprint as the signal lines themselves, adding minimal extra area while providing comprehensive protection.
Solution Approach 2:
The patent utilizes vertical stacking and multi-layer connections to reduce the horizontal footprint of the electrostatic protection circuit. By connecting gates to signal lines in one layer and using shared source/drain electrodes in adjacent layers, the protection function is achieved without significantly increasing the planar area occupied on the array substrate. This dimensional optimization allows high-density integration of protection circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces the probability of static-induced defects by enabling efficient discharge of static electricity between signal lines, improving reliability and space utilization on the array substrate, suitable for narrow frame display panels.
Implementation Method 1
Each of the transistors may be connected to one signal line and the electrostatic protection line respectively to discharge the static electricity generated on the signal line to the electrostatic protection line in time
Data Source
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AI summary
An electrostatic protection circuit, an array substrate, and a display device are provided. The electrostatic protection circuit includes: at least one first transistor (M1) and at least one second transistor (M2). A gate electrode (11) and a first electrode (12) of the first transistor (M1) are connected to a first signal line (P1), and a second electrode (13) of the first transistor (M1) is connected to a second signal line (P2). A gate electrode (21) and a first electrode (22) of the second transistor (M2) are connected to the second signal line (P2), and a second electrode (23) of the second transistor (M2) is connected to the first signal line (P1). Since the first transistor (M1) can discharge static electricity generated by the first signal line (P1) to the second signal line (P2), and the second transistor (M2) can discharge static electricity generated by the second signal line (P2) to the first signal line (P1), defects such as short circuit caused by static electricity can be avoided. Additionally, the electrostatic protection circuit does not require additional wiring on the array substrate and occupies less space.