Selectively Cross-Coupled Inverters for SEU-Resistant Fast Writes
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Solution Overview
Problem
Volatile storage elements, such as cross-coupled inverters, are susceptible to single-event upsets (SEUs) caused by ionizing particles, leading to unintended changes in state, which can result in data loss and instability, and existing methods to enhance SEU resistance often increase write time or device size.
Innovation Solution
Incorporating an impedance element in the circuit path between cross-coupled inverters, which resists rapid voltage changes caused by SEUs, allowing the circuit to revert to its pre-SEU state, and using a selectively cross-coupled third inverter to maintain the new signal state until the impedance resistance is overcome, thereby enhancing SEU resistance without increasing write time or device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing methods are used to enhance SEU resistance, then SEU resistance is improved, but write time increases
Solution Approach 1:
The patent employs dynamic switching between two different inverter configurations: a first cross-coupled inverter configuration for normal operation and a second cross-coupled inverter configuration for SEU protection. The switching mechanism dynamically transitions between these configurations based on operational requirements, allowing the system to optimize between write speed and SEU resistance without being constrained by a static design.
Solution Approach 2:
The patent changes the coupling parameters between inverters by introducing adjustable coupling elements that can modify the strength and nature of the coupling between cross-coupled inverters. By adjusting these coupling parameters, the system can enhance SEU resistance while maintaining acceptable write times, resolving the contradiction between reliability and speed.
2Reliability
If existing methods are used to enhance SEU resistance, then SEU resistance is improved, but device size increases
Solution Approach 1:
The patent merges the SEU protection functionality with the existing cross-coupled inverter structure by integrating switching mechanisms and coupling elements directly into the inverter configuration. This consolidation allows SEU resistance enhancement without requiring separate protection circuits, thereby minimizing the increase in device size.
Solution Approach 2:
The switching mechanism and coupling elements serve multiple functions: they enable normal operation in the first configuration, provide SEU protection in the second configuration, and allow dynamic transition between states. This multi-functionality reduces the need for additional dedicated protection components, keeping the device size increase minimal.
3Adaptability or versatility
If cross-coupled inverters are used for volatile storage, then storage functionality is achieved, but susceptibility to SEUs occurs
Solution Approach 1:
The patent makes the inverter coupling dynamic rather than static, allowing the system to adapt its coupling strength and configuration in response to potential SEU threats. The switching mechanism enables real-time reconfiguration from a standard cross-coupled state to a protected state, providing adaptability against SEU while maintaining storage functionality.
Solution Approach 2:
The patent introduces switching mechanisms and coupling elements as intermediary components between the cross-coupled inverters and the external environment. These intermediaries provide control over the coupling strength and can isolate the storage core from SEU-induced disturbances, reducing susceptibility while preserving storage functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the SEU resistance of volatile storage elements while maintaining short write times and minimal size increments, providing improved immunity to SEUs without the trade-offs of longer write times or increased size associated with other approaches.
Implementation Method 1
Incorporating an impedance element in the circuit path between cross-coupled inverters, which resists rapid voltage changes caused by SEUs
Data Source
AI summary
An apparatus may include a first inverter and a second inverter cross-coupled between a first node and a second node to store a signal state represented by complementary voltages at the first node and the second node. The apparatus may further include a first path defined by the second inverter that includes an impedance element to resist a flow of charge suitable to change the signal state. The apparatus may further include the first inverter and a third inverter selectively cross-coupled between the first node and the second node to store a received signal state represented by the complementary voltages at the first node and the second node responsive to an assertion of a write enable signal.