Neural Network Cross-Point Array Leakage Current Management

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Solution Overview

Problem

Conventional RRAM arrays face challenges in reducing leakage current during read operations, which limits array size and accuracy, and lack the ability to simulate the potentiation and depression of synaptic connectivity essential for neuromorphic systems.

Innovation Solution

A neural network is formed using a cross-point array of vertically stacked resistive memory devices with conductive lines in multiple layers, where the connection strength between neurons is controlled by positive and negative conductance, allowing for pattern recognition and learning through a specific voltage and current vector method.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional V/2 read method is used in RRAM arrays, then read operation can be performed, but leakage current from adjacent cells increases causing errors and limiting array size

Engineering Contradiction:
Improveread operation accuracyVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful leakage current into a useful signal by designing the read operation to intentionally include adjacent cell contributions. The differential read method captures both selected and adjacent cell currents, then uses computational processing to extract accurate data from this combined signal, transforming the previously harmful leakage into a beneficial component of the read operation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the read operation parameters by applying specific voltage patterns to word lines and bit lines, and by processing the resulting current signals through differential measurement and computational algorithms. This parameter transformation allows the system to operate successfully with larger array sizes where leakage current would traditionally be prohibitive.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If RRAM arrays are scaled up to implement neuromorphic systems with 100 trillion synaptic connections, then human brain simulation capability is achieved, but leakage current problems become more severe

Engineering Contradiction:
Improveneuromorphic system capabilityVSAvoidleakage current
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent creates a universal read operation that works for both conventional memory applications and neuromorphic computing applications. The same cross-point array structure and differential read method can be used regardless of array size, enabling scalable implementation from small memory arrays to large-scale neuromorphic systems with 100 trillion connections without encountering leakage current limitations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent moves the problem-solving approach from the device level to the system level by introducing computational processing dimensions. Instead of trying to eliminate leakage current at the device level, the system uses higher-level computational methods to handle the leakage, enabling scalability to massive array sizes required for human brain simulation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional two-state RRAM devices are used, then simple binary storage is achieved, but the ability to simulate synaptic potentiation and depression is lost

Engineering Contradiction:
Improvedevice simplicityVSAvoidsynaptic connectivity simulation
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic, multi-state resistance levels in RRAM devices that can be continuously adjusted between high and low resistance states. This dynamic resistance control enables the devices to simulate synaptic weight changes, including both potentiation (increased conductance) and depression (decreased conductance), while maintaining the underlying simple cross-point array structure for ease of manufacture.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses composite resistance change mechanisms in the RRAM devices, combining multiple physical effects and material properties to achieve continuous resistance modulation. This composite approach enables multi-state operation for synaptic simulation while maintaining manufacturing simplicity through a unified device structure.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the recognition of patterns and implementation of a neuromorphic system with minimal area, effectively utilizing leakage current and simulating synaptic connectivity, thereby overcoming the limitations of conventional RRAM arrays.

Implementation Method 1

The switching operation of the RRAM is divided into three phases: as shown in FIG. 2, a forming process for forming a conductive filament in an initial state to be a low resistance state, a reset operation for increasing the resistance of the conductive filament by breaking the conductive filament, and a set operation to be the low resistance state again.

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

a voltage of V is applied to the bit line 200, which is the top electrode of the cell 300 to be read, and 0 V is applied to the word line 100 of the bottom electrode. The other cells 410, 420, 430, and 440 sharing the lines 100 and 200 are applied with only 1⁄2 V between the top and bottom electrodes.

Methodology Applied
Scientific EffectOhm's law: Ohm's Law

Data Source

PatentUS11275999B2Neural networks using cross-point array and pattern readout method thereof
Publication Date: 2022.03.15 SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
  • US11275999B2 patent drawing
  • US11275999B2 patent drawing
  • US11275999B2 patent drawing

AI summary

A neural network using a cross-point array is provided along with a pattern readout method thereof. Resistive memory devices are stacked vertically to form the neural network as synaptic devices. The connection strength of the signal passing between two neurons is controlled by the positive and negative conductance of the resistive memory devices and it is possible to recognize and readout patterns by learning in the cross-point array.