Solid-State Devices TRIZ Cases

A transparent lower electrode and composite upper electrode structure form a storage capacitor within an LCD array substrate.

A self-aligned method forms interlayer contacts with a step profile using dielectric layers.

Through-silicon vias connect sensor arrays and control circuitry on opposing substrate sides, reducing fringing field interference.

Islands within sealant openings boost bonding strength to prevent moisture degradation without widening the sealing width.

A laminated protection sheet uses a gel layer to absorb external impact forces on flexible displays.

An auxiliary conductive portion prevents material flow during manufacturing, maintaining drain electrode thickness and conductivity.

A segmented reflective layer with discrete gaps disconnects static paths in display encapsulation.

A single mask with segmented light blocking and transmitting parts enables scan exposure to form distinct pretilt angles in vertical alignment layers.

Using integrated alignment diaphragms for MEMS and circuit substrate bonding eliminates dedicated high-accuracy equipment costs.

A cover layer encloses metal-semiconductor compound films to facilitate selective wet cleaning of unreacted residues.

A display device uses a conductive pattern as a light blocking layer between the substrate and pixel circuit.

A segmented gate insulator structure using a photosensitive resin layer enables precise through hole formation in organic thin film transistors.

Segmented inorganic insulating layers with openings and a wavy line disperse mechanical stress, preventing brittle fracture at flexible OLED borders.

Dynamic gate bias resistance and body contact in an RF switch minimize insertion loss while maintaining high linearity.

Vertical pillar structures position heaters on gate side walls to decrease reset currents and cell size.

Aperture-defining insulating layer covers electrode inner walls to block moisture ingress, preventing organic element deterioration and electrode disconnection.

Segmented fabrication builds integrated magnetic tunnel junctions and selectors, resolving integration complexity in MRAM manufacturing.

A spacer-based self-aligned etching method patterns resistive and conductive elements in RRAM using sequential mask steps.

Conductive barrier material prevents material diffusion between phase change device and switch, enhancing reliability.

Replacing sacrificial layers with conductive patterns through etched slits improves operational reliability while reducing manufacturing complexity.

Bridge wire traces connect separated conductive lines in non-display areas, minimizing inactive area visibility while managing bend stress.

A transistor design widens junction regions to establish impurity concentration gradients that reduce off-state leakage.

Shared electrode structure measures mutual and self-capacitance to detect touch and pressure, eliminating separate sensors that increase device thickness.

Recess transparent electrode inwardly relative to gate electrode using selective etching stopper films to prevent electrical shorts.

UV/ozone treatment modifies polymer surface energy to resolve adhesion failures during graphene electrode application.

Polyimide doping in perovskite layers reduces pinholes and leakage current to enhance luminescence.

Positioning the n-contact at the bottom of a mesa micro-LED eliminates lateral extensions, increasing light density and simplifying production.

An inorganic light blocking layer prevents organic material outgassing from damaging pixels, while a concave-convex oxide interface boosts bonding strength.

A deep molded plastic cup with a reflective film shapes light beams without external lenses, reducing package size and complexity.

A semiconductor memory pillar uses a block insulating film with variable thickness to suppress electrical field concentration.

A fin gate semiconductor device uses an active pillar with a smaller lattice constant inner region to induce compressive stress at the junction interface.

A thin film transistor array uses liquid-repellent ink on drain electrodes to exclude interlayer insulation material from via holes.

Conductively-doped semiconductive material electrically couples channel strings to conductor tiers in vertical memory arrays.

A light emitting device uses a tapered first lens with lower refractive index to redirect light upward.

Segmented pixel electrode blocks light from the reset transistor channel, suppressing threshold voltage variation and enhancing device reliability.

Centralizing larger blue sub-pixels compensates for weak eye discrimination, resolving chromaticity uniformity issues in OLED displays.

A refractive index matching layer fills gaps between mirror patterns to enhance light extraction efficiency.

A thin film transistor structure uses an oxygen release layer to supply oxygen to the active layer.

A signal processing circuit uses a memory element with an oxide semiconductor switching transistor to hold data without continuous power.

A multi-lead memristor system tunes oxygen vacancy concentrations to generate unique electrical responses.

Undercut air gaps in the fence structure reduce cross-talk between pixel regions to enhance signal-to-noise ratio.

Vertical stacking increases the red emitter area without expanding the footprint, resolving color balance and efficiency trade-offs.

A semiconductor on insulator substrate uses a trap rich layer with spatially varying resistivity to support distinct component regions.

A display substrate integrates a light extraction layer with a dedicated UV blocking layer to enhance optical performance.

An extended electrode connects to a conductor outside the protection member of a radiation detector.

An integrated ion reservoir maintains constant chloride activity in the reference electrode, eliminating potential drift caused by ion leakage.

Transparent spacers divide the optical clear adhesive layer into regions of varying thickness to balance deformation recovery and adhesion.

Transparent conductive material connects separated metal regions to block light reflection paths and reduce photocurrent leakage in amorphous silicon layers.

Segmented oxygen diffusion prevention layers shield contact plugs from oxidation, enabling further miniaturization of nonvolatile memory devices.

Composite metal oxide layers preserve charge trapping under thermal processing, preventing parasitic conductive channels below the buried oxide.

Segmenting the low driving voltage wire disperses current flow to prevent heat buildup and burnt defects in OLED displays.

A compensating pixel in the bending area of an edge bending display panel minimizes color and brightness discrepancies between flat and curved regions.

Plasma treatment modifies sacrificial film stress in a 3D semiconductor stack, preventing peel-off caused by thermal expansion mismatch.

Exposing the LED die back surface to a heat conductor removes thermal energy, resolving the temperature-luminance contradiction.

Rigid platinum complexes with five-membered rings act as phosphorescent emitters to produce narrow lineshape light.

Stacked pixel-defining layers maximize the emission area to resolve the high-resolution luminance trade-off in OLED displays.

Epitaxial layers form central and peripheral pillars in a substrate opening, increasing capacitance per unit area without exceeding maximum trench depth limits.

Dividing memory blocks into sub-blocks with independent erase prevention lines reduces erase time by isolating unselected regions from voltage transfer.

Uniform pillar spacing near slits prevents contact defects, while distinct protection pillar materials suppress charge accumulation.

Positioning a release element between embossing dies allows automatic detachment of cured lens wafers, resolving manual handling damage risks.

Single crystal semiconductor layers form 3D stacked memory structures through ion implantation and layer splitting.

Subwavelength graded-index structures redirect peripheral light onto sensors, increasing fill factor and simplifying integration with spectral filters.

A light emitting package uses a conformal shell separated by an air gap to protect chips while managing heat.

Segmented interlayers balance charge transport in white organic light-emitting diodes to prevent triplet exciton extinction and extend operating lifetime.

A variable resistance memory device incorporates a threshold voltage control pattern to adjust selection pattern characteristics.

Segmented insulating layers with protrusions isolate conductive stacks, resolving integration density versus manufacturing complexity trade-offs.

Nesting a color filter inside an over-coat layer seals gaps between the light-emitting structure and the filter to stop light leakage into adjacent pixels.

Multi-row detector structure with heavy metal shielding reduces cross talk and diffusion, resolving contradictions between scanning speed and imaging quality.

Electrochemical deposition creates patterned gate units to reduce pixel charging time in array substrates.

Injecting electrons into a floating backplate sets independent bias voltages, balancing nFET and pFET drive currents without dedicated circuitry.

Segmenting dummy leads into disconnected wires prevents electrical shorts with data lines, eliminating voltage reduction and dark lines in display panels.

T-shaped connectors and tapered traces equalize voltage distribution across source drivers while reducing resistance in integrated display routing.

Segmented etching with sacrificial plugs prevents sidewall exposure to sputtered metal and plasma, avoiding electrical shorts in MRAM devices.

Ion metal layer creates conductive filaments for resistance switching, reducing leakage current between miniaturized memory cells.

A semiconductor light-emitting device uses a transparent conductive material layer and an insulating layer to route light through the second electrode.

Segmented copper oxide layers with sidewall spacers control filament formation to improve resistance distribution uniformity.

Constraining photoresist mask height and implant angle reduces spacing between logic blocks with different threshold voltages.

Using spacer patterns and selective etching to form stepped hard masks, reducing total thickness while patterning cell and peripheral regions simultaneously.

Overlapping organic light emitting layers on distinct anodes resolve the trade-off between high color purity and structural complexity.

An inorganic roof layer forms microcavities without organic masks, reducing process time and improving aperture ratio.

A Mini LED backplane uses a metallic reflective layer to redirect light from micro LEDs toward the display surface.

Rare earth oxide templates enable epitaxial metal growth, suppressing defects and grain boundaries to preserve crystal quality in thin films.

Segmented resonator with variable cross-section tool head navigates narrow gaps at deep positions while maintaining structural integrity.

Stacked image sensor capacitors move deep trench storage to a separate die, resolving layout area constraints while maintaining signal integrity.

Varying reflection member thickness minimizes diffuse reflection in light-emitting areas while enhancing specular reflection in non-light-emitting zones.

Alternating pixel layout with segmented isolation films minimizes crosstalk in high-resolution image sensors.

Segmented semiconductor regions with varying bias voltages differentiate UVA, UVB, and UVC bands without expensive GaN materials.

A vertical-type channel structure in a semiconductor device increases cell current by extending the channel along the depth dimension.

A self-aligned split gate memory cell uses a recessed memory gate and dielectric liner to prevent void formation during fabrication.

A packing container uses a limiting element to constrain the flexible printed circuit board within a dedicated receiving zone.

Patterned inorganic insulating layers remove material from bendable regions to reduce stress and prevent cracking while maintaining durability.

Patterned metal shielding blocks light from black reference sensors, reducing dark current and improving gray level uniformity.

Placing variable resistance material on insulator side surfaces reduces current consumption and voltage drops across interconnects.

A light-emitting display circuit measures electrical parameters to correct control signals and maintain uniform brightness.

Differential readout converts leakage current into signal data, enabling scalable neuromorphic arrays.

A germanium-on-silicon photodetector uses highly doped silicon intermediary layers to extract current without direct metal contacts on the germanium layer.

A light-emitting layer incorporates five or more charge transport materials to establish diverse conduction pathways.

A semiconductor device uses embedded diffusion regions to attract and contain free carriers generated by back electromotive force.

Segmented encapsulant layers with a curved interface increase light extraction efficiency while maintaining strong adhesion between dissimilar materials.

Impurity concentration gradients in insulating layers enable selective etch rates, stabilizing through hole diameters and reducing contact resistance.