Semiconductor Memory Device Slit Layout and Protection Pillars
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing semiconductor memory devices face challenges in maintaining uniform electric field distribution during the formation of slits, which can lead to defects such as short-circuiting of conductive layers, particularly in the array end area where the electric field is distorted due to varying distances of memory pillars from the slit formation area.
Innovation Solution
The semiconductor memory device employs a layout where memory pillars in the array end area are arranged at substantially identical distances from the slit, maintaining a symmetric and uniform electric field distribution, thereby preventing contact between the slit and memory pillars during anisotropic etching, and uses protection pillars with different materials in place of memory pillars near the slit to reduce charge accumulation and field distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory pillars are arranged at varying distances from the slit in the array end area, then the layout flexibility is improved, but the electric field distribution becomes distorted leading to short-circuit defects
Solution Approach 1:
The patent applies local quality by arranging memory pillars at substantially identical distances from the slit specifically in the array end area, while other areas may have varying distances. This localized adjustment of pillar positioning creates a uniform electric field distribution precisely where needed (at the array end near the slit) without constraining the overall layout flexibility of the entire memory device.
2Ease of manufacture
If memory pillars are positioned closer to the slit formation area, then the manufacturing process is simplified, but the electric field distortion increases causing contact between slit and memory pillars
Solution Approach 1:
The patent implements preliminary action by pre-positioning memory pillars at substantially identical distances from the slit formation area before the anisotropic etching process. This advance arrangement ensures that when the slit is formed, the electric field distribution is already optimized, preventing contact between the slit and memory pillars and eliminating the need for post-process adjustments.
3Reliability
If protection pillars with different materials are used near the slit, then the charge accumulation is reduced, but the device complexity increases
Solution Approach 1:
The patent applies local quality by using protection pillars made of different materials specifically in the region near the slit where charge accumulation occurs, while other memory pillars can use standard materials. This localized material differentiation addresses the charge accumulation problem at the critical interface without requiring all pillars throughout the device to use multiple material types, thus limiting the increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach suppresses defects by maintaining a uniform electric field and preventing short-circuiting, ensuring high-quality semiconductor memory devices with reduced defects and improved manufacturing efficiency.
Implementation Method 1
contact between the slit and memory pillars during anisotropic etching
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a first stacked body in which a plurality of first conductive layers are stacked at intervals in a first direction above a semiconductor substrate; a second stacked body in which a plurality of second conductive layers are stacked at intervals in the first direction above the semiconductor substrate; and a first slit extending in a second direction perpendicular to the first direction, the first slit isolating the first stacked body and the second stacked body in a third direction perpendicular to the first and second directions.