Pillar-Shaped Phase-Change Memory Cell with Side-Wall Heater
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing the cross-sectional areas of resistance-changing films and lower electrodes in a current-flowing direction, leading to high reset currents and increased IR drop, which complicates the design of memory cells and increases the size of memory cells.
Innovation Solution
A semiconductor device with a pillar-shaped structure that includes a nitride film insulating layer, a titanium nitride lower electrode, and a titanium nitride reset gate, allowing for a reduced cross-sectional area of the phase-change film and heater element, enabling efficient current flow and state transition without the need for high reset currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the cross-sectional areas of GST film and heater element are decreased, then the reset current and read current can be decreased, but the manufacturing complexity increases due to the need for side wall formation and upper gate structure
Solution Approach 1:
The patent transitions from a planar transistor structure to a vertical pillar structure where the gate wraps around the pillar in three dimensions. This dimensional change allows the heater element to be positioned on the side wall of the gate pillar, achieving reduced cross-sectional area without proportionally increasing manufacturing complexity. The vertical arrangement compresses the structure in the planar direction while adding vertical layering.
Solution Approach 2:
The patent implements a nested structure where the gate electrode surrounds the heater-containing pillar, and the phase-change material is positioned within the gate structure. This nesting allows multiple functional elements (gate, heater, phase-change material) to occupy overlapping spatial regions, reducing the overall cell footprint and cross-sectional area while maintaining all necessary functions.
2Area of moving object
If a planar transistor structure is used with heater on side wall, then cross-sectional area can be reduced, but cell string configuration is required which increases device complexity
Solution Approach 1:
The patent adopts a vertical pillar structure that rises from the substrate, with the gate wrapping around the pillar vertically. This three-dimensional configuration reduces the planar cross-sectional area occupied by each memory cell while maintaining sufficient volume for all functional elements. The vertical orientation allows the heater to be positioned on the side wall without requiring complex cell string interconnections.
3Reliability
If high reset current (200 μA) is used, then the phase-change memory operation is reliable, but the memory cell size must be considerably large
Solution Approach 1:
The patent modifies the physical parameters of the heater element by positioning it on the side wall of the gate pillar, which changes the thermal coupling efficiency between the heater and the phase-change material. This geometric parameter change allows for reduced current requirements while maintaining reliable phase-change operations, as the side-wall position provides more efficient heat transfer to the GST film.
Solution Approach 2:
The patent applies local quality by concentrating the heater element in a specific location on the side wall of the gate pillar, directly adjacent to the phase-change material. This localized positioning optimizes the thermal interaction between heater and GST film, ensuring reliable phase-change operation with reduced current compared to distributed or less optimal heater configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a compact memory cell design with reduced cross-sectional areas, decreasing the reset current and read current, and accelerating cooling, thus improving the efficiency and scalability of the memory structure.
Implementation Method 1
heat is generated by a high-resistance element serving as a heater, chalcogenide glass (GST: Ge2Sb2Te5) that is in contact with the heater is melted
Implementation Method 2
When chalcogenide glass is melted at high temperature (high current) and cooled rapidly (the application of an electric current is stopped), the chalcogenide glass is brought into an amorphous state
Data Source
AI summary
The present invention provides a memory structure including a resistance-changing storage element, which enables a reset operation with a reset gate and in which cross-sectional areas of a resistance-changing film and a lower electrode in a current-flowing direction can be decreased. The semiconductor device of the present invention comprises a first pillar-shaped semiconductor layer, a gate insulating film formed around the first pillar-shaped semiconductor layer, a gate electrode made of a metal and formed around the gate insulating film, a gate line made of a metal and connected to the gate electrode, a second gate insulating film formed around an upper portion of the first pillar-shaped semiconductor layer, a first contact made of a second metal and formed around the second gate insulating film, a second contact which is made of a third metal and which connects an upper portion of the first contact to an upper portion of the first pillar-shaped semiconductor layer, a second diffusion layer formed in a lower portion of the first pillar-shaped semiconductor layer, a pillar-shaped insulating layer formed on the second contact, a resistance-changing film formed around an upper portion of the pillar-shaped insulating layer, a lower electrode formed around a lower portion of the pillar-shaped insulating layer and connected to the resistance-changing film, a reset gate insulating film that surrounds the resistance-changing film, and a reset gate that surrounds the reset gate insulating film.