Vertical-Type Channel Semiconductor Device for DRAM Refresh Stability
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Solution Overview
Problem
As semiconductor devices with horizontal-type channels experience reduced cell size and channel length, their refresh property and operation voltage control become compromised, leading to degraded performance in DRAM devices.
Innovation Solution
The implementation of a semiconductor device with a vertical-type channel structure, where a gate line traverses over a surface region and recesses are formed to create junction regions, defining a vertical-type channel that extends along lateral and vertical directions, thereby increasing cell current and stabilizing cell operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel length is reduced to increase integration scale, then device density improves, but refresh property and reliability degrade
Solution Approach 1:
The patent transitions from a conventional horizontal channel structure to a vertical channel structure by changing the spatial orientation of the channel. The channel now extends in the vertical direction (depth dimension) rather than horizontally, allowing the channel length to be increased along the vertical axis while maintaining a compact horizontal footprint. This dimensional change enables longer channels for improved reliability without sacrificing integration density.
2Productivity
If the gate width is reduced to increase integration scale, then device density improves, but operation voltage control becomes difficult and cell current reduces
Solution Approach 1:
By rotating the channel from horizontal to vertical orientation, the gate width can be increased in the lateral direction while the channel length extends vertically. This allows better control over operation voltage through an optimized gate width without compromising integration scale, as the vertical channel configuration maintains a compact horizontal footprint.
3Volume of moving object
If the channel length is reduced, then device size decreases, but cell current reduces and performance degrades
Solution Approach 1:
The vertical channel structure separates the device size (horizontal footprint) from the channel length (vertical extension). The channel length is now defined by the vertical depth of the active region rather than the horizontal distance, allowing long channels for high cell current while maintaining a compact horizontal device footprint for high integration density.
Data Source
AI summary
A semiconductor device includes an active region including a surface region and a first recess formed on both sides of the surface region, the active region extending along a first direction; a device isolation structure surrounding the active region; a pair of gate lines extending along the surface region of the active region in a second direction perpendicular to the first direction; a plurality of second recesses formed in the device isolation structure beneath the gate lines and including given portions of the gate lines filled into the second recesses; a plurality of first junction regions formed in the active region beneath the first recesses; and a second junction region formed in the surface region between the gate lines, wherein the second junction region defines at least two vertical-type channels below the gate line with the plurality of first junction regions.