T-Shaped Connector Routing for Display Source Drivers
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Solution Overview
Problem
Existing display devices face challenges in optimizing the routing configurations between connectors and source drivers, leading to issues such as uneven voltage distribution, increased resistance, and reduced performance in display and touch functionality.
Innovation Solution
The implementation of t-shaped connectors and tapered traces, along with stacked power supply and ground traces, to improve voltage matching and reduce resistance, coupled with a flexible connector configuration that provides power and signal routing to source drivers in a ratio other than one-to-one or one-to-two, enhancing the routing efficiency and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional one-to-one or one-to-two connector to source driver routing is used, then device complexity is reduced, but voltage distribution becomes uneven and resistance increases
Solution Approach 1:
The patent segments the routing configuration by introducing intermediate connection points and dividing the trace paths between connectors and source drivers. This segmentation allows for multiple smaller routing sections that can be individually optimized for voltage distribution, rather than using long single traces in conventional one-to-one or one-to-two configurations.
Solution Approach 2:
The patent applies local quality by varying the trace dimensions (width, thickness) at different locations along the routing paths. Traces are made wider or thicker in regions where voltage drop would be significant, and narrower where less current flows. This localized optimization ensures uniform voltage distribution across all source drivers while avoiding the need for overly complex global routing changes.
2Reliability
If trace width is increased to reduce resistance, then electrical conductivity improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent changes multiple trace parameters (width, thickness, length) in a coordinated manner rather than simply increasing width. By adjusting multiple parameters together, the design achieves low resistance while maintaining manufacturability. For example, moderate width increases are combined with optimized trace lengths and strategic placement of via connections to achieve the desired electrical performance without excessive manufacturing complexity.
3Loss of energy
If conventional routing configurations are used, then ease of manufacture is improved, but power dissipation increases and visual artifacts occur
Solution Approach 1:
The patent applies local quality by optimizing trace characteristics at specific locations where power dissipation is highest. Instead of uniformly increasing all trace dimensions, the design focuses on widening or thickening traces in regions with high current density or long path lengths. This localized approach reduces power dissipation and eliminates visual artifacts while maintaining simplicity in low-stress routing areas.
Data Source
AI summary
Display devices with improved routing between connectors and source drivers disposed on a substrate such as glass. Various features improve different characteristics of the routings between the connectors and source drivers. For example, a t-shaped connector is provided to ensure voltage provided to the source drivers is approximately equal. Routings may be tapered (i.e., altered in width) to reduce the amount of area consumption in locations where doing so is desirable but to decrease resistance in areas having more space. Routings may also include stacked power supply and ground traces to provide benefits such as improved decoupling capacitance. Other features are provided.