Cross-point Array Device with Threshold Switching Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Nonvolatile memory devices with cross-point memory array structures face writing and reading errors due to undesired sneak currents between adjacent unit memory cells, which existing technologies have not effectively addressed.
Innovation Solution
A cross-point array device is designed with a substrate, conductive lines, pillar structures, a resistive memory layer, and a threshold switching layer, where the resistive memory layer is formed on the side surfaces of the pillar structures, and the threshold switching layer is used to control current and voltage, preventing sneak currents by ensuring the second conductive line is positioned to avoid excessive overlap with adjacent pillar structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a cross-point memory array structure is used to achieve high integration, then memory cell density is improved, but sneak currents are generated between adjacent unit memory cells causing writing and reading errors
Solution Approach 1:
The patent divides the continuous resistive memory layer into discrete segments by forming pillar structures with isolated resistive memory regions. Each pillar structure contains its own resistive memory layer portion, physically separating adjacent memory cells and preventing sneak currents from flowing between them, thus maintaining high integration while eliminating interference errors
Solution Approach 2:
The patent introduces a threshold switching layer as an intermediary element between the first and second conductive lines at each intersection. This threshold switching layer acts as a gatekeeper that only allows current to flow when a specific threshold voltage is reached, thereby preventing unintended sneak currents from affecting adjacent memory cells while enabling selective access to individual cells
2Reliability
If a threshold switching layer is added to control current and prevent sneak currents, then data storage accuracy is improved, but device structure complexity increases
Solution Approach 1:
The patent merges the threshold switching function with the existing conductive line structure by forming the threshold switching layer directly at the intersection regions where conductive lines meet. This integration approach combines the selection function with the addressing structure, preventing sneak currents without requiring entirely separate control mechanisms, thus limiting the increase in overall device complexity
Solution Approach 2:
The patent transitions from a planar memory structure to a three-dimensional pillar structure where the resistive memory layer is formed on the side surfaces of vertical pillars. This dimensional change allows the resistive memory to be positioned in the vertical dimension rather than only in the plane, enabling better isolation between adjacent cells and reducing sneak current paths while maintaining high integration density
Data Source
AI summary
A cross-point array device includes a substrate, a first conductive line disposed over the substrate and extending in a first direction, a plurality of pillar structures disposed on the first conductive line, each of the pillar structure comprising a memory electrode, a resistive memory layer disposed along surfaces of the pillar structures, a threshold switching layer disposed on the resistive memory layer, and a second conductive line electrically connected to the threshold switching layer and extending a second direction that is not parallel to the first conductive line.