Cross-Point Memory Arrays Using High-K Dielectric and Multivalent Metal Oxide
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Solution Overview
Problem
The challenge lies in fabricating large arrays of individually-programmable memory cells with multi-layer programmable materials, requiring a highly integrated architecture with high-throughput, low-cost, and low error rate, while ensuring each memory cell can be individually programmed and integrated into semiconductor substrates effectively.
Innovation Solution
The approach involves forming cross-point memory cells with programmable materials directly between a pair of electrodes, using a method that includes forming trenches in dielectric material, depositing conductive lines, and layering high k dielectric and multivalent metal oxide materials, with conductive lines extending orthogonally to create memory cells at intersections, allowing for vertical stacking and efficient programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-layer programmable materials are used in memory cells, then memory density and nonvolatile storage capability are improved, but fabrication complexity and processing difficulty increase
Solution Approach 1:
The fabrication process is divided into discrete stages: forming trenches in dielectric material, depositing conductive lines, creating openings, and filling with programmable material. Each stage独立完成, allowing complex multi-layer structures to be built through sequential simpler steps, thereby managing fabrication complexity while achieving high memory density
Solution Approach 2:
The patent transitions from planar memory cell structures to three-dimensional vertically-stacked architectures by forming multiple levels of memory cells above one another. This vertical stacking in the third dimension dramatically increases memory density without proportionally increasing fabrication complexity, as the same process steps are repeated at different vertical levels
2Productivity
If cross-point memory cell architecture is used with orthogonal conductive lines, then memory cell integration and programming efficiency are improved, but manufacturing precision requirements increase
Solution Approach 1:
Conductive lines are formed in advance within dielectric material layers before the memory cell programming stage. This preliminary formation establishes precise orthogonal intersections that define memory cell locations, ensuring proper alignment is achieved during the structure formation phase rather than during programming operations
Solution Approach 2:
The orthogonal conductive lines serve multiple functions: they provide electrical connections, define memory cell boundaries through their intersections, and enable individual cell addressing. This multi-functionality reduces the need for additional specialized structures, simplifying manufacturing while maintaining programming efficiency
3Quantity of substance
If vertically-stacked memory cells are formed, then memory array density is improved, but processing steps and fabrication difficulty increase
Solution Approach 1:
Multiple memory cell levels are nested vertically, with each level containing complete memory cell structures including electrodes and programmable material. These nested levels are integrated into a single three-dimensional memory array, achieving high density by packing memory cells in the vertical dimension rather than requiring proportionally more fabrication processes
Solution Approach 2:
Multiple dielectric material layers and conductive line sets are merged into a unified vertically-stacked structure. The fabrication processes for different levels are combined and integrated, allowing the entire multi-level memory array to be formed through coordinated processing steps rather than separate independent fabrications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the creation of highly integrated, densely packed memory arrays with low error rates and high throughput, facilitating efficient data storage and retrieval by allowing each memory cell to be uniquely addressed and programmed.
Implementation Method 1
Such dual-layer materials may be programmed by moving oxygen species (for instance, oxygen ions) within and between the layers of the materials
Implementation Method 2
depositing conductive lines, and layering high k dielectric and multivalent metal oxide materials
Data Source
AI summary
Some embodiments include methods of forming memory cells utilizing various arrangements of conductive lines, electrodes and programmable material; with the programmable material containing high k dielectric material directly against multivalent metal oxide. Some embodiments include arrays of memory cells, with the memory cells including programmable material containing high k dielectric material directly against multivalent metal oxide.