Cross-Point Memory Cell Structure With Vertical Selector Layer
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in maintaining the performance and integrity of memory cells due to the deterioration of selector and variable resistance layers during patterning processes, leading to manufacturing defects and reduced efficiency.
Innovation Solution
The formation of a selector layer perpendicular to the substrate and conductive lines, surrounding the first electrode layer, prevents redeposition and surface roughness issues, thereby enhancing the performance and integrity of the variable resistance layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional patterning processes are used during semiconductor manufacturing, then manufacturing complexity is reduced, but the selector and variable resistance layers deteriorate leading to manufacturing defects
Solution Approach 1:
The selector layer is configured in a vertical dimension, extending from the first conductive line through the opening to the second conductive line, rather than being planar. This vertical configuration protects the selector layer from redeposition during patterning and prevents surface roughness issues, thereby improving reliability without significantly increasing manufacturing complexity
Solution Approach 2:
The selector layer surrounds the first electrode layer in a nested configuration, with the first electrode layer positioned within the opening and the selector layer enveloping its side surfaces. This nested structure protects the electrode layer and maintains layer integrity during subsequent patterning processes
2Ease of manufacture
If the selector layer is formed horizontally, then manufacturing is simpler, but redeposition and surface roughness occur during patterning
Solution Approach 1:
The selector layer transitions from a horizontal planar configuration to a vertical configuration that extends through the opening. This dimensional change eliminates surface roughness and redeposition issues during patterning while maintaining ease of manufacture through conformal deposition processes
3Productivity
If high-density cross-point arrays are manufactured, then device capacity increases, but layer deterioration and manufacturing defects increase
Solution Approach 1:
The vertical configuration of the selector layer enables high-density cross-point arrays by allowing overlapping conductive lines in three dimensions while protecting the variable resistance layer from deterioration, thus achieving both high capacity and high reliability
Solution Approach 2:
The nested structure of the selector layer surrounding the electrode layer protects the variable resistance layer during manufacturing, enabling high-density arrays without increasing defect rates
Data Source
AI summary
A semiconductor device may include: a first conductive line including an opening passing through the first conductive line; a second conductive line disposed over the first conductive line and spaced apart from the first conductive line; a first electrode layer buried in the opening; a selector layer disposed in the opening and surrounding side surfaces of the first electrode layer; and a variable resistance layer disposed over the selector layer and the first electrode layer.