Crossbar Array Programming Circuit for Sneak Current Suppression

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Solution Overview

Problem

Crossbar array circuits face challenges in reducing signal disturbances such as static sneak current and dynamic sneak current, which can lead to accidental programming of devices and performance degradation, especially as the size of the array increases.

Innovation Solution

The proposed solution involves a programming circuit design that isolates and fully prepares programming signals before release, grounds the target column to minimize dynamic sneak current, and maintains a stable voltage potential on devices to reduce sneak currents caused by wire resistance, using a 1T1R cell structure and access transistors to control current flow and suppress sneak currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If crossbar array size is increased to improve memory capacity and processing power, then productivity and functionality are improved, but signal disturbances such as sneak currents increase causing harmful effects

Engineering Contradiction:
Improvememory capacity and processing powerVSAvoidsneak currents and signal disturbances
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent divides the crossbar array into independently controllable blocks or regions, each with its own set of row and column select lines. This segmentation allows sneak currents in one block to be isolated and prevented from affecting other blocks, enabling larger overall array sizes while maintaining signal integrity through localized control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces access transistors as intermediary elements at each crosspoint or along row/column lines. These transistors act as controlled switches that prevent sneak currents from propagating through the array, allowing larger arrays to function reliably by blocking harmful current paths while permitting desired signal transmission when transistors are activated.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If conventional crossbar array design is used to simplify structure, then device complexity is reduced, but signal disturbances cause accidental programming and performance degradation

Engineering Contradiction:
Improvecircuit structureVSAvoidprogramming accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies preliminary grounding to selected column lines before programming operations and maintains stable voltage potentials on row lines during programming. This preliminary preparation of voltage states prevents sneak currents from causing accidental programming of non-target devices, improving reliability without requiring complex additional circuitry beyond standard voltage control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent dynamically changes voltage parameters (grounding specific columns, maintaining stable potentials on rows) during different operational phases. By controlling the voltage state of row and column lines according to the specific programming or read operation being performed, the patent prevents sneak currents while maintaining a relatively simple overall device structure.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12198761B2Crossbar array with reduced disturbance
Publication Date: 2025.01.14 TETRAMEM INC
  • US12198761B2 patent drawing
  • US12198761B2 patent drawing
  • US12198761B2 patent drawing

AI summary

The present application provides methods for programming a circuit device with reduced disturbances. The methods may include: selecting a first target device on a target row of a plurality of rows and a target column of a plurality of columns; selecting the target row; connecting the plurality of rows other than the target row to a voltage potential with the same polarity as a programming signal; grounding the target column; preparing the programming signal on the target rows; sending a pulse signal enable an access transistor on the target column; and sending the programming signal to pass the first target device.