Mixed 1D and Crossbar Fin Transistors for Stable GAA Scaling
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Solution Overview
Problem
Conventional transistor channel scaling faces challenges in balancing competing parameters like width, thickness, and perimeter, leading to issues such as electrical shorts, reduced channel stability, and performance degradation, particularly in gate-all-around (GAA) FETs, where existing processes are not optimized for applications requiring crossbar-shaped or H-shaped fins with an odd number of straight fins.
Innovation Solution
A method and structure that form two-dimensional (2D) crossbar-shaped or H-shaped fins alongside an odd number of one-dimensional (1D) straight fins, where the 1D fins have different critical dimensions than the 2D fins, allowing for increased cell compression and efficient channel formation by using distinct hard mask materials and spacer deposition techniques to define the fin dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional channel scaling is used to reduce transistor size, then device density increases, but electrical shorts and channel stability deteriorate
Solution Approach 1:
The channel is segmented into multiple nanosheets stacked vertically, creating discrete conducting layers separated by insulating regions. This segmentation allows independent control of each nanosheet's electrical properties while maintaining overall channel stability, preventing electrical shorts between adjacent channels even as device density increases
Solution Approach 2:
The channel structure transitions from two-dimensional planar configuration to three-dimensional stacked nanosheets. By adding the vertical dimension, the patent achieves higher device density without compromising horizontal channel spacing, thereby maintaining channel stability and preventing electrical shorts while scaling down transistor size
2Reliability
If gate-all-around (GAA) FET structure is used to improve transistor performance, then current control improves, but manufacturing complexity increases due to lack of optimization for odd-numbered straight fins
Solution Approach 1:
The spacer-based fin formation process serves multiple functions: it defines both crossbar-shaped fins and straight fins using the same deposition and etching sequence, accommodates both even and odd numbers of fins, and maintains consistent critical dimensions. This universal approach eliminates the need for separate manufacturing optimizations for different fin configurations
Solution Approach 2:
The patent uses conformal spacer deposition thickness as a controllable parameter to precisely define fin critical dimensions. By adjusting spacer deposition parameters and mandrel spacing, the process can accommodate any number of fins (odd or even) while maintaining uniform fin geometry and performance characteristics, simplifying the manufacturing process
3Shape
If crossbar-shaped fins with even number of fins are formed using existing processes, then fin symmetry is maintained, but adaptability for odd-numbered fins is lost
Solution Approach 1:
Mandrels are positioned in advance with precise spacing to define the pitch gap region, and spacers are deposited conformally before fin etching. This preliminary structuring allows the process to accommodate any number of fins (odd or even) while maintaining symmetry and uniformity, as the spacer thickness and mandrel positioning pre-determine the final fin geometry
Solution Approach 2:
The patent intentionally introduces asymmetry in mandrel positioning and spacer deposition to enable odd-numbered fin configurations. By adjusting mandrel spacing and spacer thickness, the process can create asymmetric fin patterns (odd numbers) or symmetric patterns (even numbers) as needed, providing design flexibility without sacrificing manufacturing control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances transistor performance by increasing cell compression and stability, reducing the risk of electrical shorts, and improving channel performance by optimizing the critical dimensions of both 2D and 1D fin elements.
Implementation Method 1
depositing and anisotropically etching back the first spacer material to form first and second spacers in and around the first and second mandrels
Implementation Method 2
conformally depositing and anisotropically etching back second spacer material around the first and second spacers and in the pitch gap region
Implementation Method 3
conformally depositing and anisotropically etching back second spacer material
Implementation Method 4
depositing and anisotropically etching back the first spacer material in the space with enough cycles to fill the space to form a third spacer
Data Source
AI summary
A method of forming a transistor structure is provided. The method includes forming on a substrate first and second mandrels for forming two-dimensional (2D) transistor fin elements defining a pitch gap region, depositing and anisotropically etching back the first spacer material to form first and second spacers in and around the first and second mandrels, respectively, conformally depositing and anisotropically etching back second spacer material around the first and second spacers and in the pitch gap region to define space for forming an odd number of one-dimensional (1D) transistor fin elements in the pitch gap region and depositing and anisotropically etching back the first spacer material in the space with enough cycles to fill the space to form a third spacer.