Crystal-Less CDR Frequency Detection for Stable Clock Recovery

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Solution Overview

Problem

Conventional clock and data recovery (CDR) circuits rely on external reference clock signals to adjust the frequency of built-in clock generators, which are vulnerable to semiconductor processing, temperature, and voltage variations, leading to frequency drifting issues.

Innovation Solution

A crystal-less CDR circuit with a frequency detection module that generates a control signal based on the received data signal and transition density to adjust the clock signal generated by the clock generator, allowing for self-calibration without an external reference signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an external reference clock signal is used to adjust the built-in clock generator, then frequency accuracy is improved, but system complexity and cost increase

Engineering Contradiction:
Improvefrequency accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The CDR circuit performs self-calibration by using the received data signal itself as the reference for frequency adjustment. The frequency detection module analyzes transitions in the received data signal to determine the actual clock frequency, eliminating the need for external reference clock signals and reducing system complexity while maintaining frequency accuracy.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention extracts the frequency information directly from the received data signal by analyzing its transition characteristics. The frequency detection module counts transitions and calculates frequency based on the data signal's own properties, removing the dependency on external reference signals.

Inventive Principle:
Principle #2Taking out (Extraction)

2Device complexity

If a built-in clock generator is used without external reference, then system complexity is reduced, but frequency stability deteriorates due to semiconductor processing, temperature, and voltage variations

Engineering Contradiction:
Improvesystem complexityVSAvoidfrequency stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The CDR circuit implements feedback by continuously monitoring the received data signal transitions and using this information to adjust the clock generator frequency. The frequency detection module provides real-time feedback about the actual clock frequency, allowing the system to compensate for variations in semiconductor processing, temperature, and voltage.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system uses the received data signal itself as the reference for frequency calibration, enabling the built-in clock generator to self-adjust without external references. This self-service approach maintains frequency stability despite internal variations by continuously adapting to the actual signal characteristics.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If the clock generator frequency is adjusted without external reference, then cost is reduced, but measurement precision of clock frequency deteriorates

Engineering Contradiction:
Improvemanufacturing costVSAvoidclock frequency measurement precision
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The invention replaces the traditional mechanical/electrical external reference clock system with a signal processing-based frequency detection method. The frequency detection module analytically determines clock frequency by counting transitions in the received data signal, substituting physical reference hardware with computational analysis to maintain measurement precision while reducing cost.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9686105B2Clock and data recovery circuit and frequency detection method thereof
Publication Date: 2017.06.20 REALTEK SEMICON CORP
  • US9686105B2 patent drawing
  • US9686105B2 patent drawing
  • US9686105B2 patent drawing

AI summary

The present disclosure provides a crystal-less clock and data recovery (CDR) circuit and a frequency detection method thereof. The CDR circuit includes a clock generator and a frequency detection module. The clock generator is operable to generate a clock signal. The frequency detection module coupled to the clock generator is configured for outputting a control signal to the clock generator to increase or decrease the frequency of the clock signal according to a data signal received and a transition density.