Crystalline Oxide Semiconductor Transistor Contact Resistance

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Solution Overview

Problem

Current semiconductor devices using oxide semiconductors face challenges in achieving high-speed operation and reliable performance due to limitations in contact resistance and electrical characteristics, particularly in transistors with amorphous or non-crystalline structures.

Innovation Solution

A semiconductor device with a crystalline oxide semiconductor layer, where the source and drain regions have higher crystallinity than the channel formation region, and are formed using nitrogen plasma treatment to reduce contact resistance and enhance carrier density, allowing for ohmic contact and improved transistor characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If amorphous or non-crystalline oxide semiconductor structures are used, then manufacturing simplicity is maintained, but contact resistance increases and high-speed operation cannot be achieved

Engineering Contradiction:
Improvetransistor operation speedVSAvoidcontact resistance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies local quality by creating different crystalline structures in different regions of the oxide semiconductor layer. The source and drain regions are formed with higher crystallinity to achieve low resistance and ohmic contact, while the channel formation region maintains appropriate crystallinity for carrier transport. This spatial variation in crystalline quality resolves the contradiction between achieving high-speed operation (requiring low contact resistance) and maintaining reliable electrical characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the crystallinity parameter of the oxide semiconductor layer to resolve the technical contradiction. By controlling the degree of crystallization through heat treatment and nitrogen plasma treatment, the source and drain regions achieve high crystallinity for low resistance, enabling high-speed transistor operation while maintaining reliable electrical characteristics.

Inventive Principle:
Principle #35Parameter changes

2Power

If nitrogen is added to oxide semiconductor to increase carrier density, then on-state current improves, but electrical characteristics may change under light irradiation

Engineering Contradiction:
Improveon-state currentVSAvoidelectrical characteristic stability under light irradiation
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies local quality by selectively adding nitrogen to specific regions (source and drain regions) of the oxide semiconductor layer through nitrogen plasma treatment, rather than uniformly throughout the entire layer. This localized nitrogen addition increases carrier density and on-state current in the contact regions while minimizing the impact on the channel region's electrical characteristic stability under light irradiation.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies preliminary action by performing heat treatment before nitrogen plasma treatment to form the crystalline structure. This preliminary crystallization creates a stable base structure that can better withstand subsequent nitrogen addition and resist degradation under light irradiation, thereby maintaining electrical characteristic stability while still achieving improved on-state current.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If crystalline regions are formed in source and drain regions to reduce contact resistance, then manufacturing complexity increases, but electron mobility losses due to grain boundaries increase

Engineering Contradiction:
Improvecontact resistanceVSAvoidelectron mobility
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies local quality by forming crystalline regions selectively in the source and drain regions where low resistance is critical, while maintaining appropriate crystallinity in the channel formation region for optimal carrier transport. This localized approach reduces contact resistance without introducing excessive grain boundaries in the channel that would degrade electron mobility.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite material structure by combining crystalline and amorphous phases within the oxide semiconductor layer. The source and drain regions have higher crystallinity for low resistance, while the channel region has controlled crystallinity to balance carrier transport and grain boundary effects. This composite structure optimizes both contact resistance and electron mobility.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables high-speed operation and reliable semiconductor devices with reduced electron mobility losses due to grain boundaries, improved bonding, and increased on-state current, while also suppressing changes in electrical characteristics under light irradiation.

Implementation Method 1

forming a crystalline region containing nitrogen in the crystalline oxide semiconductor layer by performing nitrogen plasma treatment on part of the crystalline oxide semiconductor layer

Methodology Applied
Scientific EffectPlasma treatment: Plasma

Data Source

PatentUS10192990B2Semiconductor device and method of manufacturing the same
Publication Date: 2019.01.29 SEMICON ENERGY LAB CO LTD
  • US10192990B2 patent drawing
  • US10192990B2 patent drawing
  • US10192990B2 patent drawing

AI summary

A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.