Crystalline Oxide Field-Effect Transistor with Self-Aligned Gate
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Solution Overview
Problem
Amorphous oxide-based field-effect transistors face issues with stability, reproducibility, heat resistance, and control of electron carrier concentration, leading to poor transparency, electrical properties, and increased overlap capacity between electrodes, which hinders their industrialization and performance in display applications.
Innovation Solution
A field-effect transistor using a crystalline oxide with an electron carrier concentration of less than 10^18/cm^3, containing indium and additional positive divalent or trivalent metal elements, is developed, where the gate electrode is self-aligned with the source and drain electrodes, and the active layer is formed in an atmosphere containing oxygen and/or water to enhance stability and reduce parasitic capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If amorphous oxide is used as the active layer, then the transistor can be formed at low temperatures, but the stability, reproducibility, and heat resistance are poor
Solution Approach 1:
The patent applies phase transition by transforming the active layer from amorphous phase to crystalline phase through heat treatment. The amorphous oxide is formed at low temperature first, then subjected to crystallization heat treatment to convert it into a stable crystalline structure, thereby achieving both low-temperature formation capability and high stability/reproducibility.
2Device complexity
If amorphous oxide is used as the active layer, then the manufacturing process is simple, but the electron carrier concentration cannot be controlled and transparency is poor
Solution Approach 1:
The patent controls electron carrier concentration by adjusting formation conditions parameters such as oxygen partial pressure, water vapor content, and temperature during the sputtering process. By precisely controlling these parameters, the electron carrier concentration is maintained below 10^18/cm³, achieving both simple manufacturing and precise electrical property control.
3Ease of manufacture
If amorphous oxide is used as the active layer, then the processing is easier, but the heat resistance is poor and threshold voltage changes during operation
Solution Approach 1:
The patent performs preliminary crystallization heat treatment on the amorphous oxide active layer before device operation. This preliminary action transforms the amorphous structure into a crystalline structure that possesses both ease of processing and high heat resistance, preventing threshold voltage shifts during subsequent device operation.
4Device complexity
If the gate electrode is not self-aligned with source and drain electrodes, then the manufacturing process is simpler, but the overlap capacity increases and operational accuracy decreases
Solution Approach 1:
The patent implements self-alignment where the gate electrode pattern is automatically aligned with the source and drain electrodes through a single photolithography process. The gate electrode is formed using the source and drain electrodes as masks, eliminating the need for separate alignment processes and reducing overlap capacity while maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The crystalline oxide-based transistor exhibits improved transparency, electrical characteristics, stability, reproducibility, heat resistance, and reduced overlap capacity, leading to enhanced image quality and operational accuracy in large-sized display devices.
Implementation Method 1
the active layer is formed in an atmosphere containing oxygen and/or water to enhance stability
Data Source
AI summary
To provide a field-effect transistor improved in transparency, electrical properties, stability, uniformity, reproducibility, heat resistance and durability, and as a reduced overlap capacity between electrodes.A field-effect thin film transistor 1001 includes a gate electrode 1025, an active layer, a source electrode 1022 and a drain electrode 1023, wherein a crystalline oxide 1021 containing indium and having an electron carrier concentration of less than 1018/cm3 is used as the active layer, and the gate electrode 1025 is in self-alignment with the source electrode 1022 and the drain electrode 1023. The crystalline oxide 1021 contains a positive trivalent element different from a positive divalent element or indium.