Crystalline Semiconductor Stack for Grain Boundary Blocking
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Solution Overview
Problem
Existing semiconductor fabrication methods, such as solid phase crystallization (SPC) and solid phase epitaxy (SPE), face challenges in controlling grain growth, leading to unwanted grain boundaries that limit device performance and reliability, particularly in applications like vertical thin-film transistors (TFTs).
Innovation Solution
A semiconductor structure is formed using a first material with a blocking material of higher crystallization temperature, a second material of higher crystallization temperature, and a third material of lower crystallization temperature, where the structure is annealed above the third material's temperature and below the second material's temperature to prevent grain boundary formation within the second material, allowing for continuous crystalline growth without interface breaks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If solid phase crystallization (SPC) is used to form crystalline films, then crystallization occurs at uniform temperature throughout the film, but grain boundaries form randomly throughout the film limiting device performance
Solution Approach 1:
The film is divided into multiple sections with different crystallization temperatures. The first section has a lower crystallization temperature than the second section. This segmentation allows controlled crystallization propagation from the first section to the second section, preventing random grain boundary formation while maintaining uniform crystallization temperature control within each section.
Solution Approach 2:
The first section with lower crystallization temperature is formed before the second section with higher crystallization temperature. This preliminary action allows the first section to crystallize first and serve as a template or seed for the second section, ensuring controlled grain growth and preventing random grain boundary formation in the second section.
2Temperature
If solid phase epitaxy (SPE) is used with varying crystallization temperatures, then crystallization can occur at lower temperatures, but grain boundaries form at undesired locations within the higher-Tc material
Solution Approach 1:
Different sections of the film are assigned different crystallization temperatures tailored to their specific locations and functions. The first section has a lower crystallization temperature suitable for its location, while the second section has a higher crystallization temperature. This local quality differentiation allows each section to crystallize at its optimal temperature without forming unwanted grain boundaries at interfaces.
Solution Approach 2:
The first section with lower crystallization temperature acts as an intermediary or seed layer for the second section with higher crystallization temperature. The crystallization front propagates from the first section into the second section, providing controlled nucleation and preventing random grain boundary formation within the higher-Tc material.
3Ease of manufacture
If lower-Tc material is placed above and below higher-Tc material, then crystallization can be seeded from both sides, but nonplanar grain boundaries form within the higher-Tc material
Solution Approach 1:
Instead of placing lower-Tc material above and below the higher-Tc material (which causes bidirectional crystallization and nonplanar grain boundaries), the invention inverts the approach by creating a sequential structure where the lower-Tc first section is followed by the higher-Tc second section. This unidirectional arrangement allows crystallization to propagate from the first section into the second section, maintaining planar grain boundaries while still achieving controlled seeding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of semiconductor structures with uniform crystalline structures throughout their thickness, reducing grain boundaries and enhancing the suitability for applications requiring single crystalline materials, such as vertical TFTs, while maintaining temperatures that do not damage electronic components.
Implementation Method 1
the structure is annealed above the third material's temperature and below the second material's temperature to prevent grain boundary formation within the second material, allowing for continuous crystalline growth
Implementation Method 2
In SPE, a film stack is formed having sections of material having varying crystallization temperatures. As the stack is heated above the Tc of one section, crystallization begins. The material with a lower Tc can 'seed' crystallization of the material with the higher Tc.
Implementation Method 3
A semiconductor structure is formed using a first material with a blocking material of higher crystallization temperature, a second material of higher crystallization temperature, and a third material of lower crystallization temperature, where the structure is annealed above the third material's temperature and below the second material's temperature to prevent grain boundary formation within the second material
Data Source
AI summary
A method includes forming a semiconductor structure. The structure includes a first material, a blocking material, a second material in an amorphous form, and a third material in an amorphous form. The blocking material is disposed between the first material and the second material. At least the second material and the third material each comprise silicon and/or germanium. The structure is exposed to a temperature above a crystallization temperature of the third material and below a crystallization temperature of the second material. Semiconductor structures, memory devices, and systems are also disclosed.