Crystallized Silicon Vertical Diode for Low Reset Current PCM Arrays
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Solution Overview
Problem
Current memory technologies face challenges in achieving high density and small cell size in crosspoint designs, particularly in forming efficient access devices and memory elements at the intersection of wordlines and bitlines, where existing diodes and phase change materials do not effectively minimize reset current and integrate well with back end of line (BEOL) processing.
Innovation Solution
The integration of a crystallized silicon vertical diode, either as a p-n junction or p-i-n junction, with a phase change material (PCM) in BEOL processing, where the diode is formed using low-temperature deposited materials annealed by an excimer laser to create a polycrystalline structure compatible with cross-point array architectures, reducing the volume of the active region and thus minimizing reset current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional diodes and phase change materials are used in crosspoint designs, then memory density can be increased, but reset current cannot be effectively minimized
Solution Approach 1:
The patent changes the physical and electrical parameters of the diode by using a specialized p-n junction structure with specific doping concentrations and a thin intrinsic layer. This modifies the diode's I-V characteristics to achieve lower reset current while maintaining high density crosspoint architecture
Solution Approach 2:
The invention combines phase change material (PCM) with a specifically designed p-n junction diode structure, creating a composite memory cell that leverages the non-volatile storage properties of PCM and the rectifying properties of the diode to simultaneously achieve high density and low reset current
2Quantity of substance
If access devices are formed at the intersection of wordlines and bitlines, then memory density increases, but integration with back end of line processing becomes difficult
Solution Approach 1:
The patent transitions from planar diode structures to vertically-oriented p-n junctions that extend through multiple interlayer dielectric layers. This vertical dimension allows the access device to be integrated into the BEOL stack without increasing lateral footprint, enabling high-density crosspoint arrays
Solution Approach 2:
The diode structure is prepared in advance with pre-formed p-type and n-type doped regions separated by an intrinsic layer, creating a ready-to-integrate vertical junction that can be seamlessly incorporated into subsequent BEOL processing steps for forming wordlines, bitlines, and PCM layers
3Quantity of substance
If small cell size is achieved in crosspoint designs, then memory density increases, but manufacturing precision requirements become more stringent
Solution Approach 1:
The patent divides the memory cell into distinct functional segments: the vertical p-n junction diode as the access device, and the phase change material as the storage element. This segmentation allows each component to be optimized and formed independently, reducing the cumulative impact of alignment errors in high-density crosspoint arrays
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of high-density, nonvolatile memory cells with reduced reset current requirements, allowing for efficient data storage and fast access, compatible with scalable 3D integration and CMOS devices, blurring the distinction between memory and computing circuits.
Implementation Method 1
the diode is formed using low-temperature deposited materials annealed by an excimer laser to create a polycrystalline structure
Implementation Method 2
low-temperature deposited materials annealed by an excimer laser to create a polycrystalline structure
Implementation Method 3
forming a second electrically conductive material over the first electrically conductive material, where the first and second electrically conductive materials define a p-n junction
Implementation Method 4
depositing a phase change material over the p-n junction and in direct contact with the second electrode
Data Source
AI summary
A method is presented for integrating an electronic component in back end of the line (BEOL) processing. The method includes forming a first electrode over a semiconductor substrate, forming a first electrically conductive material over a portion of the first electrode, and forming a second electrically conductive material over the first electrically conductive material, where the first and second electrically conductive materials define a p-n junction. The method further includes depositing a second electrode between a set of spacers and in direct contact with the p-n-junction, depositing a phase change material over the p-n junction and in direct contact with the second electrode, and forming a third electrode over a portion of the phase change material.