CTLE Circuit Using Complementary Device Inverters for Low-Voltage Equalization

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Solution Overview

Problem

Existing continuous time linear equalizer (CTLE) circuits face challenges in achieving compact, low-voltage, high-speed, and high-bandwidth performance while maintaining flexibility for frequency response adjustments in high-speed serial communication systems.

Innovation Solution

The integration of a CTLE circuit with a transconductance amplifier stage and a transimpedance amplifier stage, each incorporating complementary device inverters and programmable impedance circuits, allows for dynamic tuning of frequency responses through subtractive or additive feed-forward paths, enabling compact, low-voltage, high-speed operation with high bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If a CTLE circuit is implemented with traditional amplifier stages, then it can perform equalization, but it occupies large area and requires high voltage

Engineering Contradiction:

Improvecircuit areaVSAvoidequalization performance

Core Design Contradiction:

Area of moving objectVSReliability

Solution Approach 1:

The patent replaces traditional mechanical amplifier stages with complementary device inverters (CDIs) that perform the same signal amplification and equalization functions. The CDIs use transistor-based switching mechanisms instead of conventional amplifier circuits, achieving compact area while maintaining equalization capability through voltage-controlled current switching.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operating parameters by using low-voltage complementary devices (e.g., 1.8V or lower) instead of traditional high-voltage amplifiers. The CDI structure allows operation at reduced voltage levels while maintaining sufficient gain through optimized transistor sizing and configuration, thereby reducing both area and voltage requirements.

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If a CTLE circuit operates at low voltage, then it saves power, but it cannot achieve high-speed operation

Engineering Contradiction:

Improvepower consumptionVSAvoidoperating speed

Core Design Contradiction:

Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent introduces dynamic biasing and timing control mechanisms that allow the low-voltage CDI circuit to operate at high speeds. By dynamically adjusting the operating point and using techniques like gain boosting and adaptive equalization, the circuit maintains high-speed performance despite reduced voltage headroom.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent optimizes transistor parameters (W/L ratios, threshold voltages) and operating conditions to achieve high-speed operation at low voltage. The CDI structure allows rapid switching transitions with reduced voltage swing, and the use of overlapping clock phases and pipelined architecture ensures high data rates are maintained.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If a CTLE circuit is designed for high bandwidth, then it can handle high-speed signals, but it increases circuit complexity

Engineering Contradiction:

ImprovebandwidthVSAvoidcircuit complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the equalization function into multiple discrete CDI stages, each handling a specific frequency range or equalization task. This segmentation allows independent optimization of each stage for bandwidth while keeping individual stage complexity low. The modular structure enables cascaded configuration to achieve high overall bandwidth.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The CDI structure serves multiple functions simultaneously: it acts as an amplifier, a switch, and a frequency-selective element. The same basic CDI cell can be configured for different gain values and frequency responses by changing bias conditions and interconnection, reducing the need for separate dedicated circuits for each function.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Area of moving object

If a CTLE circuit uses complementary device inverters, then it reduces area and voltage, but it requires programmable impedance circuits for frequency tuning

Engineering Contradiction:

Improvecircuit areaVSAvoidfrequency response adaptability

Core Design Contradiction:

Area of moving objectVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic programmability where impedance values and equalization characteristics can be adjusted in real-time based on channel conditions. Digital control signals modify the CDI operating parameters and impedance circuit configurations adaptively, allowing the compact circuit to provide versatile frequency response tuning without increasing static complexity.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS11489705B1Integrated circuit including a continuous time linear equalizer (CTLE) circuit and method of operation

Publication Date: 2022.11.01 XILINX INC

AI summary

Some examples described herein provide for an integrated circuit including a continuous time linear equalizer (CTLE) circuit and a method of operating the integrated circuit. In an example, an integrated circuit includes a transconductance amplifier stage and a transimpedance amplifier stage. The transconductance amplifier stage has a first input node and a first output node. The transconductance amplifier stage includes a first complementary device inverter. The transimpedance amplifier stage has a second input node and a second output node. The first output node is electrically connected to the second input node. The transimpedance amplifier stage includes a second complementary device inverter.