Current Integrator Capacitor Switching for High Dynamic Range
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Solution Overview
Problem
Current electric current integration devices, such as CTIAs, face limitations in achieving high dynamic range without compromising sensitivity, often resulting in noise and the need for complex processing to manage scene dynamics and sensitivity, which can lead to temporal non-coherence and information loss.
Innovation Solution
A device with a capacitor terminal switching circuit and a trigger circuit that automatically adjusts the integration dynamics based on the output voltage, allowing the capacitor to switch when the voltage reaches a reference level, thereby extending the dynamic range without discharging the capacitor and maintaining sensitivity, and producing a digital signal encoding the number of switchings for each detection site.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the integration capacitor is discharged to extend dynamic range, then the measurement range is improved, but the sensitivity is degraded and noise is introduced
Solution Approach 1:
The patent implements dynamic switching of the integration capacitor's terminal connections based on the output voltage level. When the output voltage approaches saturation limits, the switching circuit automatically changes the capacitor's connection configuration to extend the linear measurement range. This dynamic adaptation allows the integrator to maintain both high sensitivity for small signals and extended dynamic range for large signals without requiring capacitor discharge, thereby avoiding the introduction of noise and loss of temporal coherence.
2Adaptability or versatility
If complex processing algorithms are used to manage scene dynamics, then the dynamic range is improved, but the device complexity and processing time increase
Solution Approach 1:
The patent replaces complex digital processing algorithms with an analog switching circuit that automatically manages the integration capacitor's terminal connections. This hardware-based solution dynamically adjusts the integrator's response to match scene dynamics in real-time, eliminating the need for complex post-processing algorithms. The switching circuit operates continuously and automatically, providing adaptability to varying scene conditions without increasing device complexity or introducing temporal delays associated with digital processing.
3Measurement precision
If the integration time is extended to improve sensitivity, then the sensitivity is improved, but the temporal coherence is degraded and frame rate decreases
Solution Approach 1:
The patent implements dynamic switching of the integration capacitor's terminal connections during the integration period based on the output voltage level. This allows the system to extend the effective linear measurement range without extending the integration time. By maintaining a fixed integration time while dynamically adjusting the capacitor connections, the system preserves temporal coherence and maintains high frame rates while achieving both high sensitivity and extended dynamic range.
Data Source
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AI summary
A device (60) for integrating an electrical current during a period T int , comprises an operational amplifier (62), and a capacitor (64) connected between a first input and an output of the amplifier (62), a second input of the amplifier (62) being brought to a voltage VBUS, the output voltage V out of the amplifier (62) saturating at a high voltage V SatH and at a low voltage V satH depending on the amount of charge on the capacitor (64). The device (60) also comprises: a circuit (72) for switching the terminals of the capacitor (64); and a circuit (74) for triggering the circuit (72) at least once during the period T int when the voltage V out is both increasing and substantially equal to a reference voltage VREF, said voltage VREF being lower than or equal to the voltage V satH , and the reference voltage VREF and the voltage VBUS (62) being chosen so as to respect relationship 2. VBUS - VREF≥V satL ; and a circuit (76) for memorising the number of times the circuit (72) is triggered between the start time and end time of the integration period.