Current Mirror Bias Circuit for Wide Input Voltage Range
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Solution Overview
Problem
Traditional bias circuits with diode-connected transistors in series have limited input voltage ranges, affecting accuracy and performance when power supply voltage is low.
Innovation Solution
A bias circuit design incorporating multiple current mirror circuits and current sources to generate precise and stable bias voltages, utilizing field effect transistors to maintain high precision and wide input voltage range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If two diode connected transistors are coupled in series to provide bias voltages, then the bias circuit structure is simple, but the input voltage range is limited and accuracy deteriorates when power supply voltage is low
Solution Approach 1:
The patent divides the bias circuit into multiple independent current mirror circuits (first, second, third, and fourth current mirror circuits) with separate transistor pairs. Each current mirror circuit operates independently to generate specific bias voltages, avoiding the series coupling limitation. This segmentation allows each transistor to operate within its optimal voltage range, maintaining accuracy across a broader input voltage range while keeping individual circuit modules simple.
2Device complexity
If two diode connected transistors are coupled in series, then the circuit configuration is compact, but the input voltage range is restricted
Solution Approach 1:
The patent transitions from a one-dimensional series coupling arrangement to a two-dimensional parallel architecture where multiple current mirror circuits operate simultaneously at different voltage levels. The first and second current mirror circuits generate first bias voltage, while the third and fourth current mirror circuits generate second bias voltage, creating multiple operational dimensions that expand the overall input voltage range without increasing physical footprint.
Data Source
AI summary
A bias circuit having a first current source, a second current source, a first current mirror circuit, a second current mirror circuit, a third current mirror circuit and a fourth current mirror circuit. The first current mirror circuit has a first transistor and a second transistor. The first current mirror circuit and the second current mirror circuit are configured to guarantee equal voltages at the drain terminals and equal voltages at the source terminals of the first and second transistors, such that the first current mirror circuit has high precision and the bias circuit has a large input voltage range.