Current-Mirror Amplifier Circuit for Fast Low-Power Memory I/O
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor amplifier circuits face challenges in achieving high-speed operation and low power consumption, particularly in nonvolatile semiconductor memory devices, due to limitations in controlling current mirror circuits and managing voltage levels.
Innovation Solution
The semiconductor amplifier circuit design incorporates current mirror circuits composed of P-type and N-type transistors, cross-coupling circuits, and diode-connected transistors to independently control the outputs of amplifier circuits accepting external inputs, allowing for quicker response times and reduced power consumption by managing voltage levels effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional amplifier circuits are used in nonvolatile semiconductor memory devices, then the circuit can operate, but the operation speed is limited and power consumption is high
Solution Approach 1:
The amplifier circuit is divided into two independent amplifier circuits (first and second amplifier circuits), each handling different voltage levels separately. This segmentation allows each amplifier to be optimized for its specific voltage range, improving overall operation speed while reducing power consumption through specialized design for each segment.
Solution Approach 2:
The patent implements dynamic voltage level switching by selecting which amplifier circuit operates based on the input signal voltage level. The first amplifier circuit handles signals at a first voltage level while the second handles a second voltage level, enabling the system to dynamically adapt to different operating conditions and optimize both speed and power consumption.
2Loss of time
If voltage levels are not properly managed in amplifier circuits, then the circuit structure can be simple, but the response time increases and power consumption rises
Solution Approach 1:
The input buffer circuit is segmented into multiple voltage level handling circuits, with each amplifier circuit dedicated to specific voltage levels. This segmentation enables faster response times by preventing voltage level conflicts and signal interference, while the modular structure keeps individual circuit components relatively simple.
Solution Approach 2:
The patent introduces intermediate control mechanisms (such as voltage level detection and circuit selection logic) that act as intermediaries between the input signal and the amplifier circuits. These intermediaries manage voltage level transitions smoothly, reducing response time without requiring complex direct circuit redesign.
Data Source
AI summary
According to one embodiment, a semiconductor amplifier circuit includes: a first amplifier circuit including first and second P-type transistors; a second amplifier circuit including first and second N-type transistors; and first to seventh current mirror circuits. The first and second current mirror circuits are connected to drains of the first and second P-type transistors. The third and fourth current mirror circuits are connected to drains of the first and second N-type transistors. The sixth current mirror circuit is connected to the first, fourth and fifth current mirror circuits. The seventh current mirror circuit is connected to the second, third and fifth current mirror circuits.