Current-Mode DAC Multipliers for Low-Power Edge AI MACs

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Solution Overview

Problem

Current digital AI & ML solutions are costly and power-hungry, making them unsuitable for edge or sensor applications, and they rely on expensive deep sub-micron manufacturing, which is not necessary for many AI & ML tasks, leading to inefficiencies in power consumption and cost.

Innovation Solution

The development of current-mode data-converters, multipliers, and multiply-accumulate circuits that can interface with digital systems, operate at low power, and are manufactured using mainstream CMOS technology, enabling hybrid analog and digital signal processing, asynchronous operations, and memory-free processing to reduce latency and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If standard digital solutions are used for AI & ML applications, then interface compatibility and programming flexibility are improved, but power consumption and cost increase significantly

Engineering Contradiction:
Improveinterface compatibilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces standard digital processing with current-mode analog processing for AI & ML operations. Current-mode circuits use current signals instead of voltage signals, enabling lower power consumption while maintaining computational functionality for matrix multiplications and neural network operations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operating parameters by using current-mode signal processing instead of voltage-mode digital processing. This parameter change enables operation at lower power levels while achieving the same AI & ML computational tasks, particularly for edge and sensor applications.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If bleeding edge deep sub-micron manufacturing is used, then digital AI & ML chip performance is improved, but cost and power consumption increase

Engineering Contradiction:
Improvecomputation speedVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent substitutes digital logic operations with current-mode analog operations, which can be implemented using standard CMOS manufacturing processes. This substitution eliminates the requirement for expensive deep sub-micron fabrication while maintaining adequate computational performance for AI & ML workloads.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs current-mode circuits that can be manufactured using cheaper, mainstream CMOS processes rather than expensive bleeding-edge fabrication. This approach accepts slightly reduced performance in exchange for significantly lower manufacturing costs, making AI & ML accessible for high-volume edge applications.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Use of energy by moving object

If current-mode data-converters are used, then power consumption is reduced, but interface compatibility with digital systems becomes more difficult

Engineering Contradiction:
Improvepower consumptionVSAvoidinterface compatibility
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent introduces current-mode digital-to-analog converters (iDACs) as intermediary components that bridge digital control interfaces and current-mode analog processing. These iDACs translate digital control signals into current signals, enabling seamless interface between digital systems and current-mode AI & ML accelerators while maintaining low power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10848167B1Floating current-mode digital-to-analog-converters for small multipliers in artificial intelligence
Publication Date: 2020.11.24 FAR ALI TASDIGHI
  • US10848167B1 patent drawing
  • US10848167B1 patent drawing
  • US10848167B1 patent drawing

AI summary

Multipliers and Multiply-Accumulate (MAC) circuits are fundamental building blocks in signal processing, including in emerging applications such as machine learning (ML) and artificial intelligence (AI) that predominantly utilize digital-mode multipliers and MACs. Generally, digital multipliers and MACs can operate at high speed with high resolution, and synchronously. As the resolution and speed of digital multipliers and MACs increase, generally the dynamic power consumption and chip size of digital implementations increases substantially that makes them impractical for some ML and AI segments, including in portable, mobile, near edge, or near sensor applications. The multipliers and MACs utilizing the disclosed current mode data-converters are manufacturable in main-stream digital CMOS process, and they can have medium to high resolutions, capable of low power consumptions, having low sensitivity to power supply and temperature variations, as well as operating asynchronously, which makes them suitable for high-volume, low cost, and low power ML and AI applications.