Current-Mode Switch Calibration for Uniform DAC and ADC Delays
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Solution Overview
Problem
Current high-speed digital-to-analogue converters (DACs) and analogue-to-digital converters (ADCs) face challenges in achieving uniform switching delays across transistors, leading to mismatch issues that affect the performance and accuracy of current-mode circuits.
Innovation Solution
The implementation of a current-mode circuit with switch units comprising field-effect transistors connected in series with variable impedances, where an adjustment circuit calibrates the impedance to match predetermined properties, such as switching delay, by comparing measurement voltages with reference voltages and adjusting resistances using digital-to-analogue converters and comparators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high-speed operation is implemented in current-mode circuits, then conversion speed is improved, but mismatch between transistors increases leading to performance degradation
Solution Approach 1:
The patent applies preliminary action by measuring and storing calibration data for each transistor before high-speed operation begins. The calibration circuit measures the actual switching delay of each transistor and stores this information in a lookup table. During high-speed conversion, the pre-measured calibration data is used to compensate for mismatches, allowing the system to achieve both high speed and accurate transistor matching without real-time measurement delays.
Solution Approach 2:
The patent changes parameters by adjusting the impedance of variable resistors based on calibration measurements. The calibration circuit determines the actual switching characteristics of each transistor and modifies the series impedance accordingly to equalize switching delays across all transistors. This parameter adjustment compensates for manufacturing variations and enables high-speed operation with reduced mismatch effects.
2Productivity
If transistor size is reduced to increase switching speed, then conversion rate is improved, but switching delay mismatch between transistors increases
Solution Approach 1:
The patent measures and stores the actual switching delay of each transistor in advance, creating a calibration lookup table that captures the unique characteristics of each transistor. This preliminary measurement allows the system to compensate for mismatch effects during high-speed operation without sacrificing conversion rate or requiring real-time measurements that would slow down the conversion process.
Solution Approach 2:
The patent implements feedback by using the measured calibration data to adjust the impedance of variable resistors in series with each transistor. The calibration circuit measures switching delay and feeds this information back through the impedance adjustment to equalize the switching characteristics of all transistors, ensuring uniform performance across the entire circuit during high-speed operation.
3Measurement precision
If calibration circuitry is added to reduce mismatch, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent introduces an intermediary variable resistor with adjustable impedance that acts as a mediator between the transistor and the rest of the circuit. This variable resistor serves as a calibration element that can be adjusted to compensate for transistor mismatch without requiring complex real-time control circuits. The intermediary element simplifies the overall calibration architecture while achieving high measurement precision.
Solution Approach 2:
The calibration process is performed in advance and the results are stored in a lookup table, eliminating the need for complex real-time calibration circuits during conversion operation. This preliminary calibration approach reduces device complexity by replacing what would otherwise require continuous complex control with simple pre-computed lookup tables and basic impedance adjustment elements.
Data Source
AI summary
A current-mode circuit, comprising: at least one switch unit, each switch unit comprising a field-effect transistor connected at its source terminal in series with an impedance and configured to carry a given current, wherein for each switch unit or for at least one of the switch units the impedance is a variable impedance; and an adjustment circuit configured, for each switch unit or for said at least one of the switch units, to adjust an impedance of the variable impedance to calibrate a predetermined property of the switch unit which is dependent on the field-effect transistor.