Current-Reuse Phased Array Element for Lower Power Consumption

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Solution Overview

Problem

Conventional phased array elements in portable devices have high power consumption, which significantly impacts battery life, necessitating a reduction in overall power usage.

Innovation Solution

A stacked phased array element configuration that reuses current from a single power supply connection, incorporating filters, a current mode phase rotator, DC offset correction block, and residual sideband reduction module, thereby reducing overall current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of moving object

If conventional phased array elements are used with separate power supply connections for each functional module, then each module can operate independently with sufficient current, but overall power consumption is high which reduces battery life

Engineering Contradiction:
Improvebattery lifeVSAvoidpower consumption
Core Design Contradiction:
Duration of action of moving objectVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple separate power supply connections into a single shared power supply connection. The phased array element uses one common DC current source that is shared across all functional modules (mixers, filters, amplifiers), eliminating redundant power supply paths and reducing overall current consumption while maintaining independent module operation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single DC current source serves multiple functions simultaneously, providing power to all functional modules within the phased array element. This universal power source replaces multiple dedicated power supplies, reducing the total current draw while ensuring each module receives adequate power for its operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple separate power supply connections are used for each functional module, then current supply reliability is maintained, but device complexity and power consumption increase

Engineering Contradiction:
Improvecurrent supply reliabilityVSAvoidpower supply configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple separate power supply connections into a single unified DC current source that serves all functional modules. This merging reduces the number of power supply components and connections, simplifying the overall device architecture while maintaining reliable current supply through the shared power source.

Inventive Principle:
Principle #5Merging (Combining)

3Power

If conventional phased array elements with multiple power connections are used, then functional performance is maintained, but overall current consumption is high

Engineering Contradiction:
Improvefunctional performanceVSAvoidcurrent consumption
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent merges multiple separate DC current sources into a single shared power supply connection that serves all functional modules. This consolidation eliminates redundant current paths and reduces total current consumption from the power supply while maintaining adequate current delivery to all modules for their respective functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent eliminates redundant power supply connections and recovers the current that would have been consumed by multiple separate supplies. By using a single DC current source, the system discards unnecessary duplicate power paths and recovers energy efficiency through shared current utilization across all functional modules.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentEP2842227B1Phased array architecture configured for current reuse
Publication Date: 2022.01.12 QUALCOMM INC
  • EP2842227B1 patent drawingFigure 1
  • EP2842227B1 patent drawingFigure 2
  • EP2842227B1 patent drawingFigure 3

AI summary

A phased array architecture configured for current reuse is disclosed. In an exemplary embodiment, an apparatus includes a current mode phase rotator (PR) module configured to generate phase shifted in-phase (I) and quadrature-phase (Q) current signals, and a current mode residual sideband (RSB) correction module configured to correct residual sideband error associated with the phase shifted I and Q current signals. The RSB correction module and the PR module form a phased array element configured to reuse a DC supply current.