Current Sense Amplifier Sample-and-Hold for Faster Settling
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Solution Overview
Problem
Conventional current sense amplifier circuits face significant settling time delays due to feedback capacitance, which amplifies noise and limits bandwidth, making them inefficient for high-voltage battery applications.
Innovation Solution
Implementing a sample and hold circuit that breaks the feedback path during the settling phase, allowing the amplifier to operate in an open loop configuration, reducing sensitivity to input and output changes and shortening the settling time by using a differential current-feedback instrumentation amplifier with a multi-cascaded gain topology and Miller compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If feedback capacitor is used in the amplifier circuit, then noise amplification is reduced and stability is improved, but settling time increases significantly
Solution Approach 1:
The patent segments the settling process into two distinct phases: a first settling phase with the feedback loop closed to reduce noise amplification, and a second settling phase with the feedback loop open to reduce overall settling time. This temporal segmentation allows the system to benefit from both closed-loop stability and fast open-loop settling without requiring a compromise between the two opposing requirements.
Solution Approach 2:
The patent dynamically switches the feedback loop state between closed and open configurations based on the settling phase. During the first settling phase, the feedback loop is closed to stabilize the amplifier and reduce noise amplification. During the second settling phase, the feedback loop is opened to enable faster settling. This dynamic reconfiguration resolves the contradiction by adapting the feedback state to the specific requirements of each settling phase.
2Object-affected harmful factors
If amplifier operates in closed loop configuration, then noise amplification is limited, but bandwidth is reduced and settling time increases
Solution Approach 1:
The patent employs periodic switching between closed-loop and open-loop configurations during the settling process. The feedback loop is periodically closed during the first settling phase to limit noise amplification, then periodically opened during the second settling phase to maximize bandwidth and reduce settling time. This periodic action allows the system to sequentially achieve both noise reduction and fast settling performance.
Solution Approach 2:
The patent performs preliminary settling in the first phase with the feedback loop closed to reduce noise amplification and establish a stable baseline. This preliminary action prepares the amplifier for the second phase, where the feedback loop is opened to enable rapid final settling. By completing the noise-sensitive settling work first, the system can then focus on speed without being constrained by noise considerations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the settling time of the current sense amplifier, minimizing noise amplification and allowing faster voltage measurement, thereby improving the overall efficiency and accuracy in high-voltage battery applications.
Implementation Method 1
feedback capacitor 110... represents either some intentionally included or inherent (i.e., parasitic) capacitance in circuit 100
Implementation Method 2
holding the output voltage using a sample and hold circuit
Data Source
AI summary
Described herein are systems and methods that reduce settling time in amplifier circuits, such as voltage sense amplifiers (VSA) or current sense amplifiers (CSA) circuits, that comprise a feedback path. When the feedback path is interrupted via a switch, a CSA circuit switches to open loop. A sample-and-hold circuit holds the output voltage of the amplifier, such that when a load is connected to the CSA circuit, the open loop settling time, which is shorter than the closed loop settling time, is allowed to pass before the CSA output voltage is measured, thereby, advantageously preventing any potential disturbance present at the CSA output from being fed back to the CSA input.