Non-volatile Storage Current Sensing with Regulated Source and P-Well Bias
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Solution Overview
Problem
Current non-volatile storage devices, particularly NAND memory designs, lack an effective method for sensing negative threshold voltage states using current sensing during read or verify operations, and voltage sensing is time-consuming and unsuitable for all bit line sensing due to capacitive coupling issues.
Innovation Solution
Regulating source and p-well voltages to positive DC levels during sensing, allowing current sensing to determine the conductive or non-conductive state of storage elements without the need for negative word line voltages, thus enabling the detection of negative threshold voltage states and improving sensing efficiency across all bit lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage sensing is used to detect storage element states, then measurement capability is achieved, but sensing time is excessive and power consumption is high
Solution Approach 1:
The patent replaces voltage sensing (electrical field measurement) with current sensing (charge flow measurement). By regulating source and p-well voltages to positive DC levels and applying a read voltage to the control gate, the system induces current flow through the storage element that can be measured by sense amplifiers. This substitution enables faster sensing operation while reducing power consumption compared to traditional voltage sensing methods.
2Speed
If current sensing is used with negative threshold voltage states, then sensing speed is improved, but accurate detection becomes difficult without negative word line voltages
Solution Approach 1:
The patent changes the voltage parameters of the source and p-well from their traditional negative or ground levels to regulated positive DC levels. This parameter change allows the storage element with negative threshold voltage to be properly biased for current sensing. By regulating VSOURCE and VPWELL to positive voltages, the system creates the appropriate electric field conditions to enable current flow through negatively-thresholded storage elements when a read voltage is applied to the control gate, making fast current sensing feasible without requiring negative word line voltages.
3Device complexity
If source voltage is not regulated during sensing, then circuit complexity is reduced, but source voltage bouncing causes sensing errors
Solution Approach 1:
The patent implements voltage regulation circuits that continuously monitor and adjust the source voltage (VSOURCE) and p-well voltage (VPWELL) to maintain them at fixed positive DC levels during sensing operations. This feedback control mechanism detects deviations from the target voltage levels and corrects them in real-time, preventing source voltage bouncing that would otherwise cause sensing errors. The regulation ensures stable operating conditions for accurate current sensing while managing the additional circuit complexity through efficient regulation design.
Data Source
AI summary
A non-volatile storage device in which current sensing is performed for a non-volatile storage element. A voltage is applied to a selected word line of the first non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages are regulated at respective positive DC levels to avoid a ground bounce, or voltage fluctuation, which would occur if the source voltage at least was regulated at a ground voltage. A programming condition of the non-volatile storage element is determined by sensing a current in a NAND string of the non-volatile storage element. The sensing can occur quickly since there is no delay in waiting for the ground bounce to settle.