Current-Steering ADC Residue Conversion for Low-Power High SNR
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Solution Overview
Problem
Existing analog-to-digital converter (ADC) technologies face challenges in achieving a high signal-to-noise ratio (SNR) and conversion bandwidth in low voltage deep submicron processes, with pipelined ADCs being power hungry and SAR ADCs not readily scalable for deep sub-micron technologies while maintaining power efficiency.
Innovation Solution
A multi-stage pipelined ADC system is proposed, utilizing a current steering first stage and a cascaded SAR second stage, which employs current domain and voltage domain signal processing, replacing switched capacitor networks with feedback resistors to convert residue current signals to voltage signals, thereby reducing power consumption and increasing conversion rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pipelined ADC architecture is used, then conversion bandwidth and signal-to-noise ratio are improved, but power consumption increases
Solution Approach 1:
The ADC is divided into multiple stages: a first stage performing coarse conversion and a second stage performing fine conversion on the residue signal. This segmentation allows each stage to be optimized independently, with the first stage using current steering for speed and the second stage using switched capacitor for precision, thereby achieving high signal-to-noise ratio while managing power consumption through staged processing
Solution Approach 2:
The patent changes the operating domain from voltage to current in the first stage by using a current steering DAC instead of a switched capacitor DAC. This parameter change enables faster conversion speed and reduced power consumption for the coarse conversion stage, while the residue is then processed in the voltage domain in the second stage
2Measurement precision
If switched capacitor networks are used, then conversion precision is maintained, but power consumption and gain-bandwidth requirements increase
Solution Approach 1:
The patent replaces the switched capacitor DAC mechanism with a current steering DAC mechanism in the first stage. This substitution eliminates the need for high-speed switching capacitors and associated amplifiers, thereby reducing power consumption and gain-bandwidth requirements while maintaining conversion precision through the current-domain processing and subsequent residue amplification
3Productivity
If current steering DAC is used in first stage, then conversion speed increases, but circuit complexity increases
Solution Approach 1:
The patent merges the current steering DAC with the residue amplifier into a unified current-domain processing stage. The current steering DAC directly generates the residue current that is then amplified, eliminating the need for separate voltage-domain conversion stages and reducing overall circuit complexity despite the sophisticated current steering mechanism
Data Source
AI summary
An analog-to-digital converter (ADC) includes a first ADC stage with a first sub-ADC stage configured to output a first digital value corresponding to an analog input voltage. A current steering DAC stage is configured to convert the analog input voltage and the first digital value to respective first and second current signals, determine a residue current signal representing a difference between the first current signal and the second current signal in the current domain, and convert the residue current signal to an analog residual voltage signal. A second ADC stage is coupled to the first ADC stage to receive the analog residual voltage signal, and convert the analog residue voltage signal to a second digital value. An alignment and digital error correction stage is configured to combine the first and the second digital values into a digital output voltage.