Current-Steering DAC Body Biasing for Leakage-Linear Tradeoffs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current digital-to-analog converters (DACs) in delta sigma modulators face linearity degradation due to non-linearity, especially at low and medium frequencies, and are limited by power consumption, requiring improved designs that reduce leakage current and maintain performance without excessive body bias voltage.
Innovation Solution
A fully differential current steering DAC with resistive degeneration and a low output impedance circuit for body biasing, which tracks threshold voltage changes due to process and temperature variations without digital control or calibration, reducing body effect and leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If body bias voltage is increased to reduce leakage current, then power consumption is reduced, but excessive bias voltage causes current to leak through P-well or N-well
Solution Approach 1:
The patent dynamically adjusts the body bias voltage parameter based on process and temperature variations. By using a low output impedance circuit to track threshold voltage changes, the bias voltage is optimized to minimize leakage current without exceeding the level that would cause well leakage, thus resolving the contradiction between reducing power consumption and avoiding harmful leakage effects.
Solution Approach 2:
The patent implements a feedback mechanism where the body bias voltage is continuously adjusted based on detected threshold voltage changes. The low output impedance circuit monitors and tracks these changes, providing real-time feedback to maintain optimal bias voltage levels that reduce leakage while preventing well leakage current, thereby resolving the energy loss versus harmful effects contradiction.
2Object-generated harmful factors
If body bias voltage is regulated to prevent well leakage, then harmful leakage is reduced, but linearity of DAC is degraded due to non-linearity
Solution Approach 1:
The patent dynamically changes the body bias voltage parameter to track threshold voltage variations caused by process and temperature effects. This dynamic adjustment maintains optimal operating conditions that preserve DAC linearity while preventing well leakage current, thus resolving the contradiction between reducing harmful leakage and maintaining manufacturing precision.
Solution Approach 2:
The patent transitions from static body bias voltage regulation to a dynamic system that continuously adapts to changing conditions. The low output impedance circuit enables real-time tracking and adjustment of bias voltage, making the system dynamic rather than static, thereby maintaining both leakage prevention and linearity performance across varying operating conditions.
3Loss of energy
If off-chip body bias voltage is generated, then leakage current is reduced, but input-output pins are consumed
Solution Approach 1:
The patent extracts the body bias voltage generation function from the off-chip environment and relocates it to an on-chip low output impedance circuit. This extraction eliminates the need for external input-output pins while maintaining the ability to reduce leakage current, thus resolving the contradiction between energy loss reduction and device complexity reduction.
Solution Approach 2:
The patent integrates multiple functions into the on-chip body bias circuit, which not only generates the bias voltage but also tracks threshold voltage changes and adapts to process and temperature variations. This multi-functional integration eliminates external pin requirements while maintaining leakage reduction capabilities, resolving the contradiction between energy efficiency and device simplicity.
4Area of stationary object
If on-chip body bias voltage is provided, then chip area is saved, but leakage current reduction capability is limited
Solution Approach 1:
The patent uses parameter changes in the low output impedance circuit to track and respond to threshold voltage variations. This enables the compact on-chip bias circuit to dynamically adjust bias voltage levels, effectively reducing leakage current despite the limited area available, thus resolving the contradiction between chip area savings and leakage reduction capability.
Solution Approach 2:
The patent implements dynamic adaptation within the compact on-chip bias circuit, enabling it to respond to changing operating conditions without requiring additional area. The dynamic tracking capability allows the small on-chip circuit to achieve effective leakage current reduction, resolving the contradiction between area constraints and energy efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the linearity and power efficiency of DACs by minimizing body effect and leakage currents, allowing the DAC to maintain performance across varying conditions without increasing power consumption or chip area.
Implementation Method 1
A body bias voltage can be applied to improve transistor performance. For example, a positive bias voltage can be applied to the body of a PMOS transistor and a negative bias voltage can be applied to the body of an NMOS transistor to change the threshold voltage, and therefore the performance, of the respective transistors.
Implementation Method 2
the DAC to track changes in a threshold voltage based on process and temperature changes without use of digital control, calibration, or a resistive ladder
Data Source
AI summary
An apparatus includes a digital-to-analog converter (DAC) and an independently controlled biasing circuit coupled to the DAC. The DAC includes at least a first transistor and a second transistor, where the first and second transistors are configured to provide output signals for the DAC. The biasing circuit includes a third transistor having a body coupled to the third transistor source and this source is coupled to a first transistor body and to a second transistor body of the first and second transistors of the DAC. A current loop is coupled to the source and the drain of the transistor of the biasing circuit that maintains a substantially same value of current in the biasing circuit as in the DAC.