Current-Steering Level Shifter for Low-Leakage Multi-Voltage SoCs
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Solution Overview
Problem
Conventional level-shifters are inefficient for systems-on-chip (SoC) designs with multiple voltage domains, particularly when the voltage differential is small, leading to significant area overhead and high leakage currents, making them unsuitable for low-power operation.
Innovation Solution
A current-steering level-shifter (CSLS) with a single N-well and seven transistors is introduced, which steers current between the two input power supply rails, reducing area usage and leakage by transferring a large current from the high power supply rail to the low power supply rail, thus optimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional level-shifters are used to interface multiple voltage domains, then voltage level conversion is achieved, but area overhead and leakage currents increase significantly
Solution Approach 1:
The patent changes the operational parameters of the level-shifter by using a single N-well configuration with seven transistors instead of conventional multi-well structures. This parameter change reduces the area while maintaining the voltage level conversion capability through optimized transistor sizing and current steering mechanisms.
Solution Approach 2:
The patent extracts and eliminates unnecessary components from conventional level-shifters, specifically removing redundant N-wells and simplifying the transistor network. This extraction of essential elements while discarding non-essential parts achieves area reduction without compromising the core voltage level conversion function.
2Reliability
If conventional level-shifters are used to interface multiple voltage domains, then voltage level conversion is achieved, but leakage currents increase significantly
Solution Approach 1:
The patent modifies the electrical parameters of the level-shifter by implementing a single N-well architecture with carefully sized transistors. This changes the leakage characteristics by reducing the number of P-N junctions and optimizing the transistor threshold voltages, thereby minimizing leakage current while preserving voltage conversion functionality.
Solution Approach 2:
The patent converts the potentially harmful leakage current into a beneficial feature by using current steering mechanisms that direct leakage current through controlled paths. The single N-well structure with optimized transistor sizing transforms what would be waste leakage into useful current that supports the voltage level conversion operation.
3Reliability
If conventional large level-shifters are used for voltage domains with limited voltage differential, then voltage level conversion is achieved, but area and power consumption increase
Solution Approach 1:
The patent optimizes the power consumption by changing the structural parameters to a single N-well configuration with seven transistors. This reduces the number of active devices and their associated power consumption, while the current steering mechanism ensures efficient power utilization during voltage level conversion for limited voltage differentials.
Solution Approach 2:
The patent segments the level-shifter function into distinct current steering paths within the single N-well structure. This segmentation allows independent control of current flow for different voltage conversion directions, reducing overall power consumption by activating only the necessary current paths for the required voltage transition.
Data Source
AI summary
Described is a level-shifter that can save area between voltage domains with limited voltage differential, and further save power by steering current between two power supply rails. The level-shifter comprises: an input to receive a first signal between a first reference rail and a second reference rail; an output to provide a second signal the first reference rail and a third reference rail, wherein in a voltage level of the third reference rail is higher than a voltage level of the second reference rail, and wherein a voltage level of the first reference is lower than the voltage level of the second reference rail and the third reference rail; and a circuitry coupled to the input and the output, wherein the circuitry is to steer current from the third reference rail to the second reference rail.