CXL Memory Controller Refresh Logic for Row Hammer Patterns
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Solution Overview
Problem
Existing DRAM systems face intermittent failures due to row hammering, which occurs from repetitive access to a single row of memory cells, causing adjacent rows to decay and data corruption, and current methods to mitigate this issue by increasing the number of registers are limited by manufacturing constraints and affect DRAM density.
Innovation Solution
A memory device and method that estimates row hammer attack patterns and adjusts refresh operations based on pattern size, reducing the need for additional registers by using a row hammer managing circuit to detect and manage various types of row hammer attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of registers is increased to manage various types of row hammer attacks, then the ability to defend against diverse row hammer attacks is improved, but the DRAM density deteriorates due to manufacturing limits
Solution Approach 1:
The patent segments the row hammer address management into two parts: a small number of registers for storing base row hammer addresses, and a pattern buffer for storing access patterns. This segmentation allows the system to defend against diverse row hammer attacks using a combination of registered addresses and pattern-matched addresses, without needing to increase the total number of registers excessively, thereby maintaining DRAM density while improving defense capability
Solution Approach 2:
The patent introduces a temporal dimension by monitoring and storing sequences of row access patterns over time. Instead of only storing static row hammer addresses in registers, the system captures the dynamic pattern of accesses (which rows are accessed, in what sequence, and how frequently) and uses this temporal information to identify and prevent row hammer attacks. This adds a time-based dimension to the address management, enabling defense against attacks that would require many additional registers in a static approach
2Adaptability or versatility
If the number of registers is increased to cover all possible row hammer attack types, then the versatility of row hammer protection is improved, but the device complexity increases beyond manufacturing limits
Solution Approach 1:
The pattern buffer serves multiple functions: it stores access patterns for monitoring, identifies potential row hammer attacks through pattern matching, and generates refresh commands for affected rows. This multi-functional design allows a single component to handle various types of row hammer attacks (including those requiring many registers in traditional approaches) without proportionally increasing device complexity. The universal pattern matching mechanism can adapt to different attack types without requiring separate register structures for each attack scenario
Solution Approach 2:
The pattern buffer acts as an intermediary between the row access controller and the refresh controller. Instead of directly increasing registers to track all possible attack scenarios, the pattern buffer mediates by capturing access patterns, analyzing them for suspicious behavior, and then triggering appropriate refresh operations. This intermediary approach simplifies the overall system architecture while maintaining comprehensive attack coverage
3Reliability
If refresh operations are performed on all adjacent rows continuously, then the protection against row hammering is improved, but the energy consumption increases
Solution Approach 1:
The system performs preliminary monitoring of row access patterns to identify potential row hammer attacks before they cause damage. By detecting suspicious access patterns (such as repeated accesses to the same row) in advance, the system can then perform targeted refresh operations only on the specific adjacent rows that are at risk, rather than continuously refreshing all adjacent rows. This preliminary detection approach reduces energy consumption by activating refresh operations only when and where needed
Data Source
AI summary
A device, an operating method of a memory controller, a memory device, and a compute express link (CXL) memory expansion device all for managing a row hammer are provided. The device includes a volatile memory and a memory controller that is configured to detect, based on input row addresses, a pattern size of a row hammer attack pattern and a row distribution of row hammer addresses, to determine, according to a type of the row distribution, whether to perform refresh management, and for every L access corresponding to the pattern size, to provide, to the volatile memory, a refresh management command and a target row address, where L is an integer greater than or equal to 1.