Cylindrical DRAM Capacitor Electrode Formation via Ozone Oxidation
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Solution Overview
Problem
Existing capacitor manufacturing methods, such as polysilicon-insulator-polysilicon (PIP) and metal-insulator-metal (MIM) capacitors, face challenges in achieving stable capacitance and node separation, particularly in higher integrated semiconductor devices, due to issues like depletion layers and the need for complex processes like chemical mechanical polishing (CMP), which increase costs and time.
Innovation Solution
A method involving the formation of a cylindrical lower electrode without CMP, using a mold layer, spin-on layer, and ozone treatment to create an insulating layer, followed by selective removal of the upper insulating film and mold layer, allowing for a dielectric layer to be formed on the substrate and electrode, resulting in a more stable and larger capacitance capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a CMP process is employed for node separation to form a cylindrical lower electrode, then the capacitance stability is improved, but the manufacturing complexity and cost increase due to additional sacrificial layer processes
Solution Approach 1:
The patent extracts and removes the problematic CMP process and sacrificial layer formation steps from the manufacturing flow. Instead of using CMP for node separation, the invention employs a direct etching approach that achieves cylindrical lower electrode formation without requiring additional buffer layers or complex polishing operations, thereby reducing manufacturing complexity while maintaining capacitance stability
Solution Approach 2:
The patent segments the manufacturing process into distinct stages: forming the mold layer with opening, depositing the lower electrode material, performing selective etching for node separation, and forming the dielectric layer. This segmentation allows each step to be optimized independently, eliminating the need for CMP while achieving the desired cylindrical electrode structure
2Manufacturing precision
If a CMP process is employed for node separation, then the lower electrode shape precision is improved, but the manufacturing time increases due to lower removal rate of metal compared to polysilicon
Solution Approach 1:
The patent replaces the mechanical CMP process with a chemical etching process. Instead of mechanically polishing the metal lower electrode (which has low removal rate), the invention uses selective chemical etching to achieve node separation and cylindrical shape formation. This substitution dramatically reduces processing time while maintaining or improving shape precision through better etch selectivity and control
Solution Approach 2:
The patent changes the fundamental parameter of the node separation process from mechanical removal (CMP) to chemical removal (etching). This parameter change exploits the different etch rates and selectivity of chemical processes compared to mechanical polishing, enabling faster and more precise formation of the cylindrical lower electrode structure
3Ease of manufacture
If a concave-shaped lower electrode is formed without CMP, then the manufacturing process is simplified, but the effective area for dielectric layer formation is reduced
Solution Approach 1:
The patent employs a cylindrical (curved) lower electrode shape formed through selective etching of the mold layer. This cylindrical geometry provides a larger surface area compared to a concave shape, enabling greater effective area for dielectric layer formation. The curved sidewalls of the cylinder maximize the contact area with the dielectric layer while maintaining ease of manufacture through the etching process
4Manufacturing precision
If doped polysilicon is used for lower and upper electrodes in PIP capacitor, then the step coverage characteristics are improved, but depletion layers form at interfaces causing capacitance variation
Solution Approach 1:
The patent uses a composite structure consisting of a metal lower electrode (such as tungsten or copper) combined with a dielectric layer. This composite material approach eliminates the depletion layer issue inherent in doped polysilicon by using metals that do not form depletion layers at interfaces. The metal-dielectric composite maintains excellent step coverage characteristics while providing stable capacitance values
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the time and cost of node separation, minimizes damage to the conductive layer, and increases the reliability of semiconductor devices by achieving a more stable capacitance without the need for CMP, thereby enhancing the performance of dynamic random access memory (DRAM) devices.
Implementation Method 1
An upper portion of the spin-on layer may be provided with an ozone gas to transform the spin-on layer into an insulating layer
Data Source
AI summary
In a method of manufacturing a capacitor and a method of manufacturing a dynamic random access memory device, an insulating layer covering an upper portion of a conductive layer may be provided with an ozone gas so as to change the property of the upper portion of the insulating layer. The upper portion of the insulating layer may be chemically removed to expose the upper portion of the conductive layer. The exposed upper portion of the conductive layer may be removed so as to transform the conductive layer into a lower electrode. The remaining portion of the insulating layer may be removed, and an upper electrode may be formed on the lower electrode.