D/A Converter Layout Using Dummy Electrodes for Resistance Uniformity
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Solution Overview
Problem
Existing D/A converters face challenges in achieving high accuracy and miniaturization due to issues with resistor design, where the proximity of gate electrodes to resistive elements leads to uneven resistance values and increased distortion, especially when trying to reduce the layout area.
Innovation Solution
The D/A conversion circuit design includes resistors with recesses on their sides facing MOS transistors and dummy electrodes, ensuring consistent resistance values by maintaining a constant distance between resistors and gate electrodes, allowing for a more accurate and compact layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If MOS transistors are disposed close to resistive elements to reduce layout area, then the area of the D/A converter is reduced, but level differences are generated in the resistive element causing resistance value variations and manufacturing defects
Solution Approach 1:
An insulating film is introduced as an intermediary layer between the gate electrode and the resistive element. This insulating film acts as a mediator that prevents the gate electrode from directly contacting and damaging the resistive element, while still allowing the MOS transistor to be disposed close to the resistive element for area reduction. The insulating film eliminates the harmful direct interaction while preserving the beneficial proximity for miniaturization.
Solution Approach 2:
The resistive element is formed before the gate electrode in the manufacturing process sequence. By preliminarily forming the resistive element and then forming the insulating film over it before creating the gate electrode, the process ensures that the resistive element's dimensions are established before any potential damage from gate electrode formation. This preliminary action prevents the gate electrode from causing level differences or dimensional variations in the resistive element.
2Measurement precision
If the number of MOS transistors is increased to improve resolving power, then the conversion accuracy is improved, but the whole area is considerably increased
Solution Approach 1:
The gate electrodes of adjacent MOS transistors are merged or closely integrated, and the resistive element is shared among multiple MOS transistors. This merging approach allows multiple transistors to function together with a common resistive element, improving the resolving power through increased bit depth while minimizing the total area by eliminating redundant components and optimizing the shared resource utilization.
Solution Approach 2:
The layout transitions from a conventional arrangement to a more compact configuration where MOS transistors are disposed in proximity to the resistive element in a optimized spatial arrangement. By changing the dimensional arrangement and utilizing vertical stacking or close-packing in the planar layout, the design achieves higher resolution with reduced area by efficiently utilizing the available space in another dimensional configuration.
Data Source
AI summary
A D/A conversion circuit includes a plurality of resistors that are connected to each other in series, and a plurality of MOS transistors that are connected to terminals of the plurality of resistors, respectively. The plurality of resistors and the plurality of MOS transistors are formed on a semiconductor substrate. Each of the plurality of resistors is constituted by a resistive element and a plurality of contacts provided in the resistive element. The plurality of MOS transistors are disposed so that a plurality of virtual straight lines that pass through each of the plurality of contacts and are perpendicular to a longitudinal direction of the resistive element pass between gate electrodes of two adjacent MOS transistors, when seen in a plan view of the semiconductor substrate.