DAC Cell Skew Measurement Using TDC-Based Timing Correction

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Solution Overview

Problem

Current digital-to-analog converters (DACs) face performance limitations due to timing skew errors, which are not effectively corrected and become significant at higher sampling and signal frequencies, impacting linearity and noise.

Innovation Solution

The implementation of a time-to-digital converter (TDC) within the DAC to measure timing skew errors on a per-cell basis, allowing for the generation of correction signals to mitigate these errors, thereby improving DAC performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If device sizes are increased to improve matching and reduce skew errors, then skew error performance is improved, but area and power dissipation increase

Engineering Contradiction:
Improveskew errorVSAvoiddevice area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent replaces the mechanical approach of reducing skew errors by increasing device size with a measurement and correction approach using a TDC. The TDC measures timing skew errors electronically, and correction signals are generated to compensate for these errors without requiring larger devices, thus substituting physical scaling with electronic measurement and correction.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If device sizes are increased to improve matching and reduce skew errors, then skew error performance is improved, but power dissipation increases

Engineering Contradiction:
Improveskew errorVSAvoidpower dissipation
Core Design Contradiction:
Manufacturing precisionVSUse of energy by stationary object

Solution Approach 1:

The patent substitutes the power-intensive approach of using larger devices for reducing skew errors with a low-power measurement and correction system. The TDC measures timing skew errors with minimal power consumption, and digital correction signals are generated to compensate for these errors, avoiding the high power dissipation associated with scaled-up device sizes.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If timing skew errors are not corrected, then device complexity is reduced, but DAC performance deteriorates at higher frequencies

Engineering Contradiction:
Improvedevice complexityVSAvoidDAC performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a TDC as an intermediary measurement device that quantifies timing skew errors without adding significant complexity to the main DAC. The TDC acts as a mediator between the DAC cells and the correction mechanism, enabling performance improvement at higher frequencies through measured-based correction rather than complex preventive design.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250183904A1Method and apparatus for skew error measurement in a digital-to-analog converter using a time-to-digital converter
Publication Date: 2025.06.05 INTEL CORP
  • US20250183904A1 patent drawing
  • US20250183904A1 patent drawing
  • US20250183904A1 patent drawing

AI summary

Method and apparatus for skew error measurement and correction in a digital-to-analog converter (DAC) using a time-to-digital converter (TDC). A DAC includes a main DAC and a TDC. The main DAC includes a plurality of DAC cells. The main DAC is configured to generate an analog output signal based on digital input data. The TDC is coupled to an output of the main DAC and configured to measure a timing error of the main DAC. The timing error may be measured on a DAC cell basis or a subset of DAC cells basis.