Pseudo-Random DAC Core Selection for Interleaving Spur Control
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Solution Overview
Problem
High-speed time-interleaved digital-to-analog converters (DACs) face issues with undesirable spurs at the output due to mismatches between DAC cores, which are difficult to completely eliminate through design and calibration, especially at sample rates greater than 15 GSPS, affecting performance and requiring relaxation of design requirements such as speed, complexity, and power consumption.
Innovation Solution
Implementing a randomized time-interleaved DAC architecture where the selection of DAC cores is pseudo-randomized, spreading the energy of interleaving spurs into the noise floor or out of the band of interest, and utilizing slower DAC cores to achieve higher aggregate sample rates while relaxing design requirements through appropriate clocking and randomization logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If sequential time-interleaved DAC cores are used to achieve high sample rates, then the sampling rate increases, but undesirable spurs appear at the output due to mismatches between DAC cores
Solution Approach 1:
The patent applies dynamics by transitioning from fixed sequential selection to dynamic randomized selection of DAC cores. The selection sequence is no longer deterministic but varies randomly over time, which spreads the spur energy across the frequency spectrum rather than concentrating it at specific frequencies. This dynamic approach resolves the contradiction by maintaining high sampling rates while eliminating the periodicity that causes harmful spurs.
Solution Approach 2:
The patent changes the selection parameter from deterministic sequential indexing to randomized selection with controlled probability distributions. By modifying how DAC cores are selected (using random variables and probability mass functions), the system achieves high sampling rates without the harmful periodic spurs that arise from fixed sequential patterns. The parameter change transforms the selection mechanism to spread energy distribution across frequencies.
2Object-generated harmful factors
If design and calibration are used to eliminate mismatches between DAC cores, then spur reduction is achieved, but design complexity and calibration requirements increase
Solution Approach 1:
The patent extracts the mismatch problem from the design and calibration domain and relocates it to the signal processing domain. Instead of trying to eliminate mismatches through complex design and calibration, the invention accepts mismatches as inherent and uses randomized selection to spread their effects. This extraction principle resolves the contradiction by removing the need for complex mismatch elimination while maintaining spur reduction.
Solution Approach 2:
The patent converts the harmful effect of mismatches into a beneficial spreading of spur energy. Rather than viewing mismatches as problems to be eliminated through complex design, the invention uses randomized selection to transform concentrated spurs into distributed noise-like signals. This conversion resolves the contradiction by making the system robust to mismatches without requiring complex design or calibration.
3Productivity
If multiple DAC cores are used in time-interleaved fashion to achieve high sample rates, then productivity increases, but the complexity of coordinating and managing multiple cores increases
Solution Approach 1:
The patent applies dynamics by using time-varying randomized selection patterns to coordinate multiple DAC cores. Instead of complex deterministic coordination logic, the system uses random selection sequences that naturally distribute work across cores while maintaining high effective sample rates. This dynamic coordination resolves the contradiction by simplifying the management of multiple cores while maximizing productivity.
Data Source
AI summary
A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.