DAC Calibration With Error DACs to Break Current Source Error Accumulation

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Solution Overview

Problem

Digital-to-analog converters (DACs) in wireless communication systems face significant errors due to accumulation of individual errors from current sources, leading to reduced accuracy and performance.

Innovation Solution

The implementation of a DAC system with multiple current sources, calibration DACs, a reference current source, and two error DACs that work in a ping-pong fashion to dynamically adjust and compensate for errors, breaking the error accumulation by using a current mirror and error DACs to calibrate each current source sequentially.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional DAC calibration is used, then the DAC system can operate, but error accumulation from multiple current sources reduces conversion accuracy

Engineering Contradiction:
Improveconversion accuracyVSAvoiderror accumulation
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements feedback by using error DACs to measure and compensate for calibration errors. The error DACs detect the difference between the actual current output and the expected current output, then feed back correction signals to eliminate the accumulated errors from multiple current sources, thereby improving conversion accuracy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces error DACs as intermediary components between the current sources and the output. These error DACs act as mediators that isolate and compensate for errors introduced by individual current sources, preventing error accumulation and improving overall system reliability and accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If multiple calibration DACs are used to compensate for each current source, then accuracy improves, but device complexity increases

Engineering Contradiction:
Improvecalibration accuracyVSAvoidcalibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple calibration functions into a unified calibration architecture using error DACs. Instead of implementing separate complex calibration circuits for each current source, the error DACs consolidate the calibration function by measuring and compensating errors from all current sources through a unified feedback mechanism, thereby reducing overall device complexity while maintaining high accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The error DACs serve multiple functions: they calibrate multiple current sources, measure errors, and provide compensation signals. This multi-functionality eliminates the need for separate dedicated calibration circuits for each current source, reducing device complexity while achieving comprehensive calibration coverage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If sequential calibration of current sources is implemented, then error accumulation is reduced, but calibration time increases

Engineering Contradiction:
Improveerror reductionVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent maintains continuity of useful action during calibration by using error DACs that can continuously or periodically compensate for errors without requiring complete system shutdown or lengthy recalibration procedures. The feedback mechanism allows for ongoing error correction, reducing the effective calibration time while maintaining high precision.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces error accumulation, improving the accuracy of digital-to-analog conversion and enhancing the signal-to-noise-plus-distortion ratio (SNDR) by four times compared to conventional methods, allowing for smaller calibration DACs and a more efficient DAC system.

Implementation Method 1

a current mirror having a first branch selectively coupled to the plurality of current sources, wherein a second branch of the current mirror is coupled to the reference current source

Methodology Applied
Scientific EffectCurrent mirror effect:

Data Source

PatentUS11539371B1Digital-to-analog converter (DAC) calibration using error DACs
Publication Date: 2022.12.27 QUALCOMM INC
  • US11539371B1 patent drawing
  • US11539371B1 patent drawing
  • US11539371B1 patent drawing

AI summary

Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) system. The DAC system generally includes a plurality of current sources, a plurality of calibration DACs, each coupled to a respective one of the plurality of current sources, a reference current source, and a current mirror having a first branch selectively coupled to the plurality of current sources, wherein a second branch of the current mirror is coupled to the reference current source. The DAC system also includes a first error DAC selectively coupled to the first branch and the second branch of the current mirror, and a second error DAC selectively coupled to the first branch and the second branch of the current mirror.