DAC Resolution Enhancement Using LSB Digital Logic
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Solution Overview
Problem
Current digital-to-analog converters (DACs) face challenges in achieving high resolution without increasing the number of DAC unit elements, leading to inefficiencies in chip area and power consumption, especially as the data word length increases beyond 8 bits.
Innovation Solution
A digital enhancement circuit that logically operates on the least significant bit (LSB) of the input data to generate an additional code bit, allowing for N+1 bit resolution without increasing the number of DAC unit elements, by enabling both sides of a differential circuit in the least significant DAC unit element, effectively doubling the resolution without adding hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If thermometer code is used to achieve high-resolution DAC, then monotonicity and DNL performance are improved, but the number of DAC unit elements increases exponentially requiring 2^N-1 elements for N-bit resolution
Solution Approach 1:
The patent segments the DAC architecture into three distinct parts: a coarse DAC (most significant bits), a fine DAC (least significant bit), and a digital enhancement circuit. This segmentation allows the system to achieve N+1 bit resolution without requiring all 2^N-1 unit elements to be active simultaneously, thereby reducing the effective number of analog elements needed while maintaining high resolution through digital logic enhancement.
2Measurement precision
If segmented DAC or coarse and fine DAC is used to improve resolution, then N+1 bit resolution is achieved, but power consumption and chip area increase
Solution Approach 1:
The patent applies local quality by making only the least significant bit DAC element configurable through digital enhancement logic, while the coarse DAC remains standard. This localized enhancement approach allows the system to achieve N+1 bit resolution with minimal additional complexity and power consumption, rather than redesigning the entire DAC architecture. The digital enhancement circuit selectively modifies only the necessary portion of the signal path.
3Measurement precision
If segmented DAC or coarse and fine DAC is used to improve resolution, then N+1 bit resolution is achieved, but chip area increases
Solution Approach 1:
The patent uses digital copying of the LSB signal through the digital enhancement circuit, which logically processes the least significant bit to generate the additional resolution bit. This digital copying approach replaces what would otherwise require additional analog DAC unit elements, significantly reducing the chip area required for high-resolution conversion while maintaining the N+1 bit capability.
Data Source
AI summary
Described herein are apparatus and methods for digitally enhancing digital-to-analog converter (DAC) resolution. A digitally enhanced DAC includes a decoder circuit configured to convert a N-bit input data to at least N code bits, a digital enhancement circuit configured to logically operate on a least significant bit (LSB) of the N-bit data, and a switching network including at least N DAC unit elements, where a least significant DAC unit element is controlled by the digital enhancement circuit to output a factored nominal current or voltage when a logical operation outputs a defined logic level for the LSB and to output a nominal current or voltage absent output of the defined logic level and a remaining DAC unit elements are controlled by a remaining code bits of the at least N code bits. This provides a N+1 bit resolution for the DAC without increasing the at least N DAC unit elements.