DAC Self-Calibration for Static Mismatch in CT Delta-Sigma Modulators
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Solution Overview
Problem
High-performance digital-to-analog converters (DACs) in continuous-time delta-sigma modulators suffer from static mismatch errors, which degrade the accuracy and performance of analog-to-digital conversion systems, particularly in multi-bit CTDSMs, leading to undesirable harmonic distortions and reduced Signal-to-Noise-and-Distortion Ratio (SNDR) and spurious free dynamic range (SFDR).
Innovation Solution
A digital calibration technique that utilizes the DAC unit elements themselves to measure and correct static mismatch errors without additional circuitry, by forcing each element to output its complementary value and using the rest of the elements to measure the error, which can be stored in a look-up table for correction in the digital or analog domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional DAC designs are used in continuous-time delta-sigma modulators, then the system can operate at high speeds, but static mismatch errors cause harmonic distortions and degraded SNDR performance
Solution Approach 1:
The patent applies preliminary action by measuring and correcting DAC unit element mismatches before the actual high-speed conversion operation. The calibration process sequentially forces each DAC element to output complementary values and measures the errors using other elements, storing correction values in a look-up table. This pre-calibration eliminates static mismatch errors that would otherwise degrade SNDR performance during high-speed operation.
2Measurement precision
If calibration circuitry is added to correct DAC mismatch errors, then conversion accuracy improves, but device complexity increases
Solution Approach 1:
The patent implements self-service by using the DAC unit elements themselves to measure each other's mismatches during calibration. Each DAC element serves dual purposes: it converts analog signals during normal operation and acts as a measurement tool for calibrating other elements. The calibration process forces one element to output a known complementary value while other elements measure the actual output, eliminating the need for external calibration equipment or complex additional circuitry.
3Device complexity
If DAC unit elements are used to measure each other's mismatch, then no extra circuitry is needed, but the calibration process requires sequential forcing and measuring of each element
Solution Approach 1:
The patent applies periodic action by implementing a sequential calibration process where each DAC unit element is calibrated one at a time in a systematic cycle. The calibration controller sequentially selects each element, forces it to output complementary values, and measures its mismatch using other elements. This periodic sequential approach ensures all elements are calibrated without requiring complex parallel calibration circuitry, balancing calibration time with circuit simplicity.
Data Source
AI summary
Digital-to-analog converters (DACs) are used widely in electronics. The DACs are usually not ideal and typically exhibits errors, e.g., static mismatch errors. This disclosure describes a digital calibration technique for DAC static mismatch in continuous-time delta-sigma modulators (CTDSMs). The methodology utilizes the DAC unit elements (UEs) themselves to measure each other's mismatch. There are no extra circuitries except for the logic design inside DAC drivers or comparators. The methodology is an attractive calibration technique for high performance CTDSMs, especially for high speed system in multi-gigahertz range with low over-sampling rate (OSR).