Data Accumulation Apparatus Using Binary Tree and Gating Control
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Solution Overview
Problem
Current digital signal processing systems face inefficiencies in accumulation operations due to high power consumption, limited flexibility, and fixed data accumulation patterns, which hinder real-time performance and throughput in applications like neural networks and video decoding.
Innovation Solution
A data accumulation device utilizing a tree structure, specifically a binary or Wallace tree, with a control module that generates gating, register selection, and flag signals to flexibly accumulate input data, allowing for partial sum storage and selection, thereby achieving accumulation within a log2N time delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software-level accumulation operation is used, then flexibility is maintained, but processing efficiency is low and power consumption is high
Solution Approach 1:
The patent replaces software-level accumulation operations with a hardware-based accumulation circuit. The adder tree structure with multiple adders operates in parallel at the hardware level, providing both high processing efficiency and flexibility through configurable input selections and accumulation patterns.
2Productivity
If distributed system is used to accelerate accumulation, then processing speed is improved, but communication overhead increases and processor resources are occupied
Solution Approach 1:
The patent merges multiple accumulation operations into a single integrated hardware circuit. The adder tree structure combines multiple input data streams and performs accumulation operations simultaneously within one device, eliminating the need for separate communication channels and reducing overall system complexity.
3Productivity
If fixed-pattern accumulation circuit is used, then hardware efficiency is improved, but flexibility is reduced and functions are specialized
Solution Approach 1:
The patent designs a universal accumulation circuit that can handle multiple accumulation patterns and data formats. The configurable selection logic allows the same hardware structure to perform different accumulation operations (e.g., accumulating different numbers of inputs, different data widths) without requiring specialized circuits for each function.
4Adaptability or versatility
If complex logic device is used, then accumulation function is achieved, but transmission delay increases and basic frequency cannot be improved
Solution Approach 1:
The patent segments the accumulation operation into a hierarchical adder tree structure. Multiple small-scale adders operate in parallel at lower levels, with results propagated upward through the tree. This segmentation reduces the critical path delay compared to a single large adder, enabling higher operating frequencies while maintaining the accumulation function.
Data Source
AI summary
The present disclosure provides a data accumulation device and method, and a digital signal processing device. The device comprises: an accumulation tree module for accumulating input data in the form of a binary tree structure and outputting accumulated result data; a register module including a plurality of groups of registers and used for registering intermediate data generated by the accumulation tree module during an accumulation process and the accumulated result data; and a control circuit for generating a data gating signal to control the accumulation tree module to filter the input data not required to be accumulated, and generating a flag signal to perform the following control: selecting a result obtained after adding one or more of intermediate data stored in the register to the accumulated result as output data, or directly selecting the accumulated result as output data. Thus, a plurality of groups of input data can be rapidly accumulated to a group of sums in a clock cycle. At the same time, the accumulation device can flexibly select to simultaneously accumulate some data of the plurality of input data by means of a control signal.