Data Bus Duty Cycle Calibration for Parallel Signal Path Distortion
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Solution Overview
Problem
Existing data bus duty cycle distortion compensation techniques in memory sub-systems are inadequate, as they fail to account for local variations between parallel signal paths, leading to increased errors and sub-optimal performance, especially at high input/output speeds.
Innovation Solution
A calibration circuit determines a representative duty cycle for multiple parallel signal paths using passive low pass filters and adjusts trim values to compensate for distortion, effectively reducing duty cycle distortion and improving signal accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing data bus duty cycle distortion compensation techniques are used, then the system is simple to implement, but the measurement precision and signal accuracy deteriorate due to failure to account for local variations between parallel signal paths
Solution Approach 1:
The patent divides the data bus into multiple parallel signal paths and implements separate calibration for each path. The calibration circuit measures duty cycle distortion individually for each signal path rather than using a single compensation value for all paths, thereby accounting for local variations and improving measurement precision.
Solution Approach 2:
The patent applies local quality by determining separate trim values for each parallel signal path based on their individual duty cycle characteristics. Each signal path receives customized compensation tailored to its specific distortion profile, rather than applying a uniform compensation approach across all paths.
2Reliability
If existing compensation techniques are used, then the device complexity is low, but the reliability deteriorates due to increased errors at high input/output speeds
Solution Approach 1:
The patent performs duty cycle calibration in advance during manufacturing or initialization, determining trim values for each signal path before actual operation. This preliminary calibration ensures that compensation is already in place for high-speed operations, improving reliability without adding complexity to the operational phase.
Solution Approach 2:
The calibration circuit measures the actual duty cycle of each signal path and uses this feedback information to determine appropriate trim values. This closed-loop approach ensures that compensation is based on actual measured conditions, improving the reliability of signal transmission at high speeds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves signal calibration and reduces errors by compensating for systematic and die-to-die variations, enhancing the performance of memory sub-systems and other electronic circuit devices.
Implementation Method 1
A calibration circuit determines a representative duty cycle for multiple parallel signal paths using passive low pass filters
Data Source
AI summary
An electrical circuit device includes a signal bus comprising a plurality of parallel signal paths and a calibration circuit, operatively coupled with the signal bus. The calibration circuit can perform operations including determining a representative duty cycle for a plurality of signals transferred via the plurality of parallel signal paths, the plurality of signals comprising a plurality of duty cycles and comparing the representative duty cycle for the plurality of signals transferred via the plurality of parallel signal paths to a reference value to determine a comparison result. The calibration circuit can perform further operations including adjusting, based on the comparison result, a trim value associated with the plurality of duty cycles of the plurality of signals to compensate for distortion in the plurality of duty cycles and calibrating the plurality of duty cycles of the plurality of signals using the adjusted trim value.