Cross-Coupled Data Latch Circuit With Reduced Transistor Count

The patent merges the functions of multiple transistors into a more compact configuration. Specifically, it combines the data input path and data output path sharing common transistors (such as transistor 101 being shared between first inverter circuit 10 and second inverter circuit 20), reducing the total transistor count from the conventional 12 transistors to 9 transistors while maintaining data latch functionality.

The patent implements multi-functionality where certain transistors serve multiple purposes. For example, transistor 101 functions both as part of the data input path (connecting data bus to first inverter) and as part of the data output path (connecting first inverter to second inverter). This universal usage of components reduces overall circuit complexity and size.

The patent reduces device complexity by merging functions of separate transistors. The conventional design uses 12 transistors with distinct roles, while this patent uses only 9 transistors by combining control functions. For instance, the control signals for data input and data output are managed through shared control transistors, simplifying the control logic and reducing component count.

The patent introduces dynamic control through control signals (such as /WBS and /DBS) that enable or disable specific transistor paths based on operational mode. This dynamic switching allows the same circuit structure to perform multiple functions (data input, data output, data retention) without requiring separate dedicated transistors for each function, thereby reducing overall complexity.

The patent merges data paths to reduce wiring complexity. Specifically, the data input path and data output path share common wiring segments and control signals. The data bus connections are optimized so that the same physical wiring serves both input and output operations, reducing the total number of wire segments and connection points.

The control signal wiring is designed to be multi-functional. Control signals such as /WBS (write bus select) and /DBS (data bus select) are used to control multiple transistors simultaneously, enabling a single control wire to manage both data input and data output operations. This universal control wiring reduces the overall wiring complexity while maintaining efficient data transfer capability.