Data Reception Chip Noise Filtering via Internal Reference Voltage

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Solution Overview

Problem

Data reception chips face interference from external noise when accessing memories, affecting data accuracy due to the lack of effective noise filtering and reference voltage generation within the chip.

Innovation Solution

A data reception chip is designed with a comparison module and a voltage generation module that generates a reference voltage using a series of resistors and a selection unit, capable of tracking signal changes and reducing error rates by integrating noise filtering and eliminating the need for additional pins.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the data reception chip receives external signals to access memory, then data access functionality is enabled, but external noise interferes with the accessing operation and affects data accuracy

Engineering Contradiction:
Improvedata access functionalityVSAvoiddata accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary reference voltage signal generated internally by the data reception chip to mediate between the external data signal and the comparison operation. This internally generated reference voltage acts as a mediator that is synchronized with the external signal characteristics, allowing accurate comparison while filtering out external noise interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where the data reception chip monitors the received signal characteristics and adjusts its internal reference voltage generation accordingly. The comparison module feeds back information about signal quality and timing, enabling the voltage generation module to dynamically adjust the reference voltage to maintain optimal data accuracy despite external noise conditions.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If a reference voltage is generated using external components and pins, then data accuracy can be improved, but the number of pins and device complexity increases

Engineering Contradiction:
Improvedata accuracyVSAvoidnumber of pins
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the reference voltage generation function directly into the data reception chip by integrating the voltage generation module with the comparison module. This consolidation eliminates the need for separate external voltage reference components and additional pins, while maintaining the ability to generate accurate reference voltages that track external signal characteristics.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The data reception chip becomes self-sufficient by generating its own reference voltage internally rather than relying on external components. The integrated voltage generation module automatically produces the required reference voltage based on the chip's internal operation voltage, eliminating dependencies on external pin connections and reducing overall system complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces error rates in data reception by generating a reference voltage that compensates for signal changes and noise, improving data accuracy without increasing the number of pins or external noise entry, thus enhancing the chip's performance.

Implementation Method 1

The first resistors are connected in series with one another and dividing a first operation voltage to generate a plurality of first divided voltages

Methodology Applied
Scientific EffectVoltage division: Ohm's Law

Data Source

PatentEP3174059B1Data reception chip
Publication Date: 2019.11.06 VIA ALLIANCE SEMICON CO LTD
  • EP3174059B1 patent drawingFigure 1A
  • EP3174059B1 patent drawingFigure 1B
  • EP3174059B1 patent drawingFigure 2A~2B

AI summary

A data reception chip coupled to an external memory comprising a first input-output pin to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage and includes a plurality of first resistors and a first selection unit. The first resistors are connected in series with one another and dividing a first operation voltage to generate a plurality of first divided voltages. The first selection unit selects one of the first divided voltages as the first reference voltage according to a first control signal.