Two-Stage Data Sampling Circuit With DFE for LPDDR ISI
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Solution Overview
Problem
In low power double data rate (LPDDR) memories, the increasing signal transmission rate leads to channel loss, causing intersymbol interference, which existing equalizers fail to address effectively due to increased power consumption.
Innovation Solution
A data sampling circuit incorporating a first and second sampling module, a latch module, and a decision feedback equalization module, along with an offset compensation module, to reduce intersymbol interference while minimizing power consumption by integrating decision feedback equalization in a parallel configuration with the second sampling module.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate equalizer is arranged at the receiver to compensate for channel loss, then intersymbol interference is reduced, but power consumption increases
Solution Approach 1:
The patent combines the equalization function with the existing data sampling circuit by adding a decision feedback equalization module that operates in parallel with the sampling path. This integration allows the equalizer to share infrastructure with the sampling circuit, reducing the need for separate power-consuming equalization hardware while still providing effective intersymbol interference compensation.
Solution Approach 2:
The patent implements a decision feedback equalization mechanism where the output of the sampling circuit is fed back to generate compensation signals that are applied to the input. This feedback approach allows the system to adaptively cancel intersymbol interference without requiring additional power-intensive components, as the feedback path utilizes existing circuit resources.
2Productivity
If signal transmission rate is increased to improve data throughput, then productivity is improved, but channel loss increases causing more intersymbol interference
Solution Approach 1:
The decision feedback equalization module uses feedback from the sampled data to generate compensation signals that counteract the effects of channel loss. This allows the system to maintain signal quality at higher transmission rates by adaptively correcting intersymbol interference in real-time, enabling faster data transmission without sacrificing reliability.
Solution Approach 2:
The equalization module dynamically adjusts its compensation parameters based on the actual channel conditions and signal characteristics. By changing the equalization parameters adaptively rather than using fixed values, the system can optimize performance for different transmission rates and channel states, maintaining signal quality even as transmission rate increases.
Data Source
AI summary
Embodiments provide a data sampling circuit and a data sampling device. The sampling circuit includes: a first sampling module configured to respond to a signal from a data signal terminal and a signal from a reference signal terminal and to act on a first node and a second node; a second sampling module configured to respond to a signal from the first node and a signal from the second node and to act on a third node and a fourth node; a latch module configured to input a high level signal to a first output terminal and input a low level signal to a second output terminal or input the low level signal to the first output terminal and input the high level signal to the second output terminal according to a signal from the third node and a signal from the fourth node; and a decision feedback equalization module.