Data Strobe Amplifier Circuit for High-Speed Signal Integrity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-speed operating semiconductor memory devices require an amplifier that can generate proper data strobe signals to ensure efficient data transmission and reception, but existing amplifiers struggle to maintain signal integrity at high speeds.

Innovation Solution

The amplifier design includes NMOS and PMOS transistors with specific configurations and operations to generate and manage data strobe signals DQS and BDQS, ensuring proper signal crossing and transmission even at high speeds through careful control of node potentials and current mirroring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing amplifiers are used, then device complexity is reduced, but signal integrity deteriorates at high speeds

Engineering Contradiction:
Improvesignal integrityVSAvoidamplifier configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The amplifier is divided into multiple functional blocks: a first amplifier generating an internal strobe signal, a second amplifier generating the data strobe signal, and a discharge circuit. This segmentation allows each block to be optimized for its specific function, improving signal integrity at high speeds while managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first amplifier generates an internal strobe signal in advance before the actual data transmission occurs. This preliminary action allows the system to prepare the timing reference signal beforehand, ensuring proper synchronization and signal integrity when high-speed operation begins.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If high-speed operation is implemented, then productivity is improved, but signal integrity worsens

Engineering Contradiction:
Improveoperating speedVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The discharge circuit receives control signals based on the internal strobe signal and actively discharges the output node to ground when needed. This feedback mechanism ensures that the output signal maintains proper timing and voltage levels even at high operating speeds, preventing signal degradation and maintaining integrity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The amplifier circuit dynamically adjusts its operating parameters including voltage levels and timing characteristics to maintain signal integrity at high speeds. The internal strobe signal generated by the first amplifier serves as a timing reference that adapts to the operating speed, allowing the second amplifier to generate data strobe signals with appropriate parameters for high-speed operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9679617B2Amplifier
Publication Date: 2017.06.13 KIOXIA CORP
  • US9679617B2 patent drawing
  • US9679617B2 patent drawing
  • US9679617B2 patent drawing

AI summary

According to one embodiment, an amplifier includes a first inverter which inverts and delays a first signal to generate a second signal. A second inverter inverts and delays a third signal to generate a fourth signal. A first transistor includes a gate electrode supplied with the second signal. A second transistor includes a gate electrode supplied with the fourth signal. An output terminal is coupled to one terminal of the second transistor and outputs a fifth signal. A third inverter inverts and delays the fifth signal to generate a sixth signal. A first discharge circuit discharges one terminal of the first transistor and the one terminal of the second transistor based on the first, sixth, or fourth signal, and includes one terminal coupled to the other terminal of each of the first and second transistors.