Data Strobe Delay Control for ISI-Resistant Memory Read Training
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Solution Overview
Problem
Semiconductor devices face challenges in performing reliable data read operations in systems requiring low power consumption and high-speed operation, particularly in reducing Inter-Symbol Interference (ISI) during read training operations.
Innovation Solution
A semiconductor device comprising a variable delay circuit, data sampler, and control circuit that delays and synchronizes data strobe signals with a reference voltage to determine logic levels, and uses filters to reduce pre-cursor and post-cursor ISI, with the control circuit adjusting delay and reference voltage to optimize sampling timing and filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is read at high speed in low-power systems, then power consumption is reduced and operation speed is improved, but Inter-Symbol Interference (ISI) increases and data reading reliability deteriorates
Solution Approach 1:
The patent adjusts the sampling timing parameter by delaying the data strobe signal to optimally sample the data signal, and modifies the reference voltage parameter to compensate for signal degradation. These parameter changes enable reliable data reading at high speeds by adapting to the distorted signal characteristics caused by ISI.
Solution Approach 2:
The control circuit uses feedback from the data sampler to dynamically adjust the delay control signal and reference voltage. This closed-loop feedback mechanism continuously optimizes the sampling timing and reference level based on the actual signal quality, maintaining high reading reliability despite high-speed operation-induced ISI.
2Measurement precision
If sampling timing is not optimized, then device complexity is reduced, but data reading accuracy deteriorates due to ISI
Solution Approach 1:
The patent introduces dynamic adjustability to the sampling circuit through the variable delay circuit controlled by the delay control signal. This allows the sampling timing to be dynamically optimized for different operating conditions, achieving high reading accuracy without requiring an overly complex fixed-structure circuit.
Solution Approach 2:
The control circuit performs multiple functions: it generates the delay control signal, adjusts the reference voltage, and coordinates the sampling operation. This multi-functionality reduces the need for separate dedicated circuits, achieving high reading accuracy while controlling overall device complexity.
3Reliability
If delay amount of data strobe signal is not adjusted, then device complexity is reduced, but data reading reliability deteriorates due to timing misalignment
Solution Approach 1:
The variable delay circuit pre-adjusts the data strobe signal timing before the sampling operation occurs. This preliminary action of delaying the strobe signal ensures that the sampling occurs at the optimal moment, improving reading reliability without requiring complex real-time adjustment mechanisms during the actual sampling process.
Data Source
AI summary
A semiconductor device may include: a variable delay circuit configured to delay a data strobe signal according to a delay control signal and output a delayed data strobe signal; a data sampler configured to compare a level of a reference voltage and a value of a data signal in synchronization with the delayed data strobe signal, and determine a logic level of the value of the data signal, the data signal having a training pattern; and a control circuit configured to determine a delay amount of the data strobe signal and generate the delay control signal and the reference voltage according to an output signal of the data sampler.