Data Strobe Delay Correction Circuit for Low-Power Memory Writes
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Solution Overview
Problem
Conventional memory devices consume excessive power to correct delays in data strobe signals during write operations, as they rely on internal high-voltage power sources.
Innovation Solution
A memory device with a correction circuit that generates a reference delay for the data strobe signal and a main circuit that corrects the signal based on this reference, using external power sources to reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an internal high-voltage power source is used to correct data strobe signal delay, then the delay correction function is achieved, but power consumption increases significantly
Solution Approach 1:
The patent introduces an external voltage source as an intermediary component to provide the high voltage needed for delay correction. Instead of generating high voltage internally through a power source, the external voltage source acts as a mediator that supplies the necessary voltage to the correction circuit, thereby achieving delay correction without the power consumption penalty of an internal high-voltage generator.
Solution Approach 2:
The patent extracts the high-voltage generation function from the memory device by using an external voltage source. The correction circuit is decoupled from the internal power supply system, and the high-voltage generation task is taken out and performed externally. This separation allows the memory device to maintain delay correction capability while avoiding the power consumption associated with internal high-voltage generation.
2Measurement precision
If a correction circuit with counter and delay cell is implemented, then delay correction precision is improved, but device complexity increases
Solution Approach 1:
The correction circuit is segmented into distinct functional modules: a delay cell for generating reference delays, a first counter for adjusting the reference delay, and a second counter for determining the actual delay of the data strobe signal. This segmentation allows each component to perform a specific function with high precision while making the overall circuit more manageable and maintainable despite the increased complexity.
Solution Approach 2:
The delay cell generates and stores a reference delay value in advance through the first counter before the actual delay correction is needed. This preliminary action prepares the correction circuit with pre-calibrated delay values, enabling precise delay measurement and correction during write operations without requiring complex real-time calculations.
Data Source
AI summary
A memory device correcting a data strobe signal when performing a write operation includes a correction circuit configured to receive the data strobe signal and to generate a reference delay for the received data strobe signal, and a main circuit configured to correct the data strobe signal based on the reference delay generated by the correction circuit. The correction circuit includes a delay cell configured to generate a reference delay for the data strobe signal received by the main circuit and to store the generated reference delay, when a data signal is input to the main circuit, a first counter configured to adjust the reference delay, and a second counter configured to determine a delay of the data strobe signal received by the main circuit, when a write operation is performed.