Data Strobe Multiplexer for eMMC Timing Alignment

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Solution Overview

Problem

In embedded MultiMediaCard (eMMC) systems, synchronizing data transfers between the host and eMMC devices is challenging due to imperfect conductors and changing propagation delays, especially in high-speed modes where the data strobe signal is not always available, leading to issues with sampling data accurately without introducing errors.

Innovation Solution

The host device determines a timing relationship between the data strobe signal and internal clock signal using delay circuits to align read data sampling, and in the absence of a data strobe signal, uses additional hardware like a multiplexer circuit to implement data strobe functionality without requiring a dedicated pin, allowing for calibration and optimal delay value determination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a dedicated data strobe pin is used for high-speed data transfer, then data sampling accuracy is improved, but device complexity and pin count increase

Engineering Contradiction:
Improvedata sampling accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies multi-functionality by enabling data pins to serve dual purposes: transferring data in normal mode and transmitting data strobe signals in high-speed mode. The memory controller dynamically switches between these modes based on operation type, allowing the same physical pins to provide both data and timing functions, thereby eliminating the need for dedicated strobe pins while maintaining sampling accuracy

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements dynamic mode switching between normal data transfer mode and high-speed mode. The memory controller adjusts the functional configuration of data pins in real-time based on the operation requirements, transitioning from static pin assignment to dynamic reconfiguration. This allows the system to optimize performance for different operating conditions without increasing physical hardware complexity

Inventive Principle:
Principle #15Dynamics

2Device complexity

If data pins are used for both data and data strobe signals, then device complexity is reduced, but signal interference and sampling errors increase

Engineering Contradiction:
Improvedevice complexityVSAvoidsignal integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent employs periodic action through structured mode switching between normal mode and high-speed mode. Data strobe signals are transmitted in periodic bursts during high-speed operations, while data transfer continues in normal mode. This time-division approach ensures that data and strobe signals occupy the same physical medium at different times, preventing simultaneous interference while maintaining signal integrity

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent maintains continuous useful action by ensuring that data pins are always utilized - either for data transfer in normal mode or for strobe signal transmission in high-speed mode. The seamless mode switching eliminates idle periods and ensures continuous productive operation, while the temporal separation of data and strobe functions prevents signal conflicts and maintains reliability

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20240345621A1Data strobe multiplexer
Publication Date: 2024.10.17 LODESTAR LICENSING GROUP LLC
  • US20240345621A1 patent drawing
  • US20240345621A1 patent drawing
  • US20240345621A1 patent drawing

AI summary

Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.